LTC3115-2_15 Datasheet, PDF (28/42 Pages) Linear Technology – 40V, 2A Synchronous Buck-Boost DC/DC Converter

LTC3115-2
Applications Information
Assuming a multiple of 50 separation between the pole
frequencies and zero frequencies this can be simplified
to the following expression:
G_CENTER
=
20log
⎡
⎣⎢
50
2π f_CR_TOP
C_FB
⎤
⎦⎥
dB
This equation completes the set of constraints needed to
determine the compensation component values. Specifi-
cally, the two zeros, f_ZERO1 and f_ZERO2, should be located
near 3.43kHz. The two poles, f_POLE2 and f_POLE3, should be
located near 168kHz and the gain should be set to provide
a gain at the crossover frequency of G_CENTER = –19dB.
The first step in defining the compensation component
values is to pick a value for R_TOP that provides an accept-
ably low quiescent current through the resistor divider.
A value of R_TOP = 1MΩ is a reasonable choice. Next, the
value of C_FB can be found in order to set the error ampli-
fier gain at the crossover frequency to –19dB as follows:
G_CENTER = –19.1dB
=
20log
⎡
⎣⎢
2π
50
(24kHz)(1
M
Ω)C_FB
⎤
⎦⎥
C_FB
=
2π
(24kHz
50
)(1 M Ω) alog ^{⎛⎝⎜}
–1290.1⎞⎠⎟
@3.0nF
The compensation poles can be set at 168kHz and the
zeros at 3.43kHz by using the expressions for the pole
and zero frequencies given in the previous section. Setting
the frequency of the first zero, f_ZERO1, to 3.43kHz results
in the following value for R_FB:
R_FB
=
2π
1
(3nF)(3.43kHz)
≅
15.4kΩ
This leaves the free parameter, C_POLE, to set the frequency
f_POLE1 to the common pole frequency of 168kHz as given:
C_POLE
=
2π
1
(15.4kΩ)(168kHz)
≅
62pF
Next, C_FF can be chosen to set the second zero, f_ZERO2, to
the common zero frequency of 3.43kHz.
C_FF
=
2π
1
(1MΩ)(3.43kHz)
≅
47
pF
Finally, the resistor value R_FF can be chosen to place the
second pole at 168kHz.
R_FF
=
2π
(
1
47pF)(168Hz)
≅
20.0
kΩ
Now that the pole frequencies, zero frequencies and gain
of the compensation network have been established, the
next step is to generate a Bode plot for the compensated
error amplifier to confirm its gain and phase properties.
A Bode plot of the error amplifier with the designed com-
pensation component values is shown in Figure 13. The
Bode plot confirms that the peak phase occurs at 24kHz
and the phase boost at that point is 57.7°. In addition,
the gain at the peak phase frequency is –19.3dB which is
close to the design target.
15
10
5
0
–5
–10
–15
–20
–25
–30
–35
–40
10
90
60
PHASE
30
GAIN
0
–30
f_C
100
1k
10k 100k
FREQUENCY (Hz)
–60
–90
1M
31152 F13
Figure 13. Compensated Error Amplifier Bode Plot
28
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31152fa