LTC3115-2_15 Datasheet, PDF (10/42 Pages) Linear Technology – 40V, 2A Synchronous Buck-Boost DC/DC Converter

LTC3115-2
Pin Functions (DHD/FE)
RUN (Pin 1/Pin 2): Input to Enable and Disable the IC and
Set Custom Input UVLO Thresholds. The RUN pin can be
driven by an external logic signal to enable and disable
the IC. In addition, the voltage on this pin can be set by
a resistor divider connected to the input voltage in order
to provide an accurate undervoltage lockout threshold.
The IC is enabled if RUN exceeds 1.21V nominally. Once
enabled, a 0.5µA current is sourced by the RUN pin to
provide hysteresis. To continuously enable the IC, this pin
can be tied directly to the input voltage. The RUN pin cannot
be forced more than 0.3V above V_IN under any condition.
SW2 (Pin 2/Pin 3): Buck-Boost Converter Power Switch
Pin. This pin should be connected to one side of the buck-
boost inductor.
PV_OUT (Pin 3/Pin 4): Buck-Boost Converter Power Output.
This pin should be connected to a low ESR capacitor with
a value of at least 10µF. The capacitor should be placed as
close to the IC as possible and should have a short return
path to ground. In applications with V_OUT > 20V that are
subject to output overload or short-circuit conditions, it
is recommended that a Schottky diode be installed from
SW2 (anode) to PV_OUT (cathode). In applications subject
to output short circuits through an inductive load, it is rec-
ommended that a Schottky diode be installed from ground
(anode) to PV_OUT (cathode) to limit the extent that PV_OUT
is driven below ground during the short-circuit transient.
GND (Pins 4, 5/Pins 5, 6): Signal Ground. These pins are
the ground connections for the control circuitry of the IC
and must be tied to ground in the application.
VC (Pin 6/Pin 7): Error Amplifier Output. A frequency
compensation network must be connected between this
pin and FB to stabilize the voltage control loop.
FB (Pin 7/Pin 8): Feedback Voltage Input. A resistor divider
connected to this pin sets the output voltage for the buck-
boost converter. The nominal FB voltage is 1000mV. Care
should be taken in the routing of connections to this pin in
order to minimize stray coupling to the switch pin traces.
RT (Pin 8/Pin 9): Oscillator Frequency Programming Pin.
A resistor placed between this pin and ground sets the
switching frequency of the buck-boost converter.
V_CC (Pin 9/Pin 12): Low Voltage Supply Input for IC Con-
trol Circuitry. This pin powers internal IC control circuitry
and must be connected to the PV_CC pin in the application.
A 4.7µF or larger bypass capacitor should be connected
between this pin and ground. The V_CC and PV_CC pins must
be connected together in the application.
V_IN (Pin 10/Pin 13): Power Supply Connection for Internal
Circuitry and the V_CC Regulator. This pin provides power
to the internal V_CC regulator and is the input voltage sense
connection for the V_IN divider. A 0.1µF bypass capacitor
should be connected between this pin and ground. The
bypass capacitor should be located as close to the IC as
possible and should have a short return path to ground.
PV_CC (Pin 11/Pin 14): Internal V_CC Regulator Output. This
pin is the output pin of the internal linear regulator that
generates the V_CC rail from V_IN. The PV_CC pin is also the
supply connection for the power switch gate drivers. If
the trace connecting PV_CC to V_CC cannot be made short in
length, an additional bypass capacitor should be connected
between this pin and ground. The V_CC and PV_CC pins must
be connected together in the application.
BST2 (Pin 12/Pin 15): Flying Capacitor Pin for SW2. This pin
must be connected to SW2 through a 0.1µF capacitor. This
pin is used to generate the gate drive rail for power switch D.
BST1 (Pin 13/Pin 16): Flying Capacitor Pin for SW1. This pin
must be connected to SW1 through a 0.1µF capacitor. This
pin is used to generate the gate drive rail for power switch A.
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