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LTC3115-2_15 Datasheet, PDF (14/42 Pages) Linear Technology – 40V, 2A Synchronous Buck-Boost DC/DC Converter
LTC3115-2
Operation
Oscillator and Phase-Locked Loop
The LTC3115-2 operates from an internal oscillator with a
switching frequency that is configured by a single external
resistor between the RT pin and ground. For noise sensi-
tive applications, an internal phase-locked loop allows
the LTC3115-2 to be synchronized to an external clock
signal applied to the PWM/SYNC pin. The phase-locked
loop is only able to increase the frequency of the internal
oscillator to obtain synchronization. Therefore, the RT
resistor must be chosen to program the internal oscilla-
tor to a lower frequency than the frequency of the clock
applied to the PWM/SYNC pin. Sufficient margin must
be included to account for the frequency variation of the
external synchronization clock as well as the worst-case
variation in frequency of the internal oscillator. Whether
operating from its internal oscillator or synchronized to an
external clock signal, the LTC3115-2 is able to operate with
a switching frequency from 100kHz to 2MHz, providing
the ability to minimize the size of the external components
and optimize the power conversion efficiency.
Error Amplifier and VIN Divider
The LTC3115-2 has an internal high gain operational
amplifier which provides frequency compensation of the
control loop that maintains output voltage regulation. To
ensure stability of this control loop, an external compensa-
tion network must be installed in the application circuit.
A Type III compensation network as shown in Figure 2 is
recommended for most applications since it provides the
flexibility to optimize the converter’s transient response
while simultaneously minimizing any DC error in the
output voltage.
As shown in Figure 2, the error amplifier is followed by
an internal analog divider which adjusts the loop gain by
the reciprocal of the input voltage in order to minimize
loop-gain variation over changes in the input voltage.
This simplifies design of the compensation network and
optimizes the transient response over the entire range of
input voltages. In addition, the analog divider provides a
feed-forward correction for input voltage transients by
immediately adjusting the voltage at the input to the PWM
in response to a change in input voltage. This minimizes
output voltage transients especially for line steps with rise
VOUT
RTOP
RBOT
RFF
CFF
LTC3115-2
1000mV +
FB
–
RFB
CFB
CPOLE
VIN
÷ PWM
VC
31152 F02
Figure 2. Error Amplifier and Compensation Network
and fall times that are much faster than the bandwidth of
the control loop. However, when powered from an inductive
or high ESR source the VIN divider may respond to drops
in the input voltage caused by changes in input current
resulting in a loop interaction with the input impedance.
This is most likely to occur in boost mode operation at high
inductor currents. This interaction can degrade the phase
margin of the control loop and even lead to oscillation.
This situation can be avoided by reducing the impedance
of the connection to PVIN or by adding an electrolytic ca-
pacitor at PVIN of sufficient value to damp the input filter
and stabilize the voltage at the input of the part.
Details on designing the compensation network in
LTC3115-2 applications can be found in the Applications
Information section of this data sheet.
Inductor Current Limits
The LTC3115-2 has two current limit circuits that are
designed to limit the peak inductor current to ensure that
the switch currents remain within the capabilities of the
IC during output short-circuit or overload conditions.
The primary inductor current limit operates by injecting
a current into the feedback pin which is proportional to
the extent that the inductor current exceeds the current
limit threshold (typically 3A). Due to the high gain of
the feedback loop, this injected current forces the error
amplifier output to decrease until the average current
through the inductor is approximately reduced to the
current limit threshold. This current limit circuit maintains
the error amplifier in an active state to ensure a smooth
recovery and minimal overshoot once the current limit
fault condition is removed. However, the reaction speed
14
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31152fa