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LTC3115-2_15 Datasheet, PDF (25/42 Pages) Linear Technology – 40V, 2A Synchronous Buck-Boost DC/DC Converter
LTC3115-2
Applications Information
GAIN
–20dB/DEC
–20dB/DEC
90°
0°
–90°
PHASE
fZERO1 fPOLE2 fPOLE3
fZERO2
f
31152 F10
In most applications the compensation network is designed
so that the loop crossover frequency is above the resonant
frequency of the power stage, but sufficiently below the
boost mode right half plane zero to minimize the additional
phase loss. Once the crossover frequency is decided upon,
the phase boost provided by the compensation network
is centered at that point in order to maximize the phase
margin. A larger separation in frequency between the
zeros and higher order poles will provide a higher peak
phase boost but may also increase the gain of the error
amplifier which can push out the loop crossover to a
higher frequency.
Figure 10. Type III Compensation Bode Plot
The transfer function of the compensated Type III error
amplifier from the input of the resistor divider to the output
of the error amplifier, VC, is:
VC(s)
VOUT(s)
=
GEA
⎛
⎝⎜
1+
2π
s⎞
fZERO1⎠⎟
⎛
⎝⎜
1+
2π
s
fZERO2
⎞
⎠⎟
s
⎛
⎝⎜
1+
2π
s
fPOLE2
⎞
⎠⎟
⎛
⎝⎜
1+
2π
s⎞
fPOLE3 ⎠⎟
The error amplifier gain is given by the following equation.
The simpler approximate value is sufficiently accurate in
most cases since CFB is typically much larger in value
than CPOLE.
( ) GEA = RTOP
1
CFB +CPOLE
≅1
R TOP CFB
The pole and zero frequencies of the Type III compensation
network can be calculated from the following equations
where all frequencies are in Hz, resistances are in ohms,
and capacitances are in farads.
fZERO1
=
2π
1
RFBCFB
( ) fZERO2 = 2π
1
RTOP +RFF
≅
1
CFF 2πRTOPCFF
fPOLE2
=
CFB +CPOLE
2πCFBCPOLERFB
≅
2π
1
CPOLERFB
fPOLE3
=
1
2πCFF
RFF
The Q of the power stage can have a significant influence
on the design of the compensation network because it
determines how rapidly the 180° of phase loss in the power
stage occurs. For very low values of series resistance, RS,
the Q will be higher and the phase loss will occur sharply.
In such cases, the phase of the power stage will fall rapidly
to –180° above the resonant frequency and the total phase
margin must be provided by the compensation network.
However, with higher losses in the power stage (larger
RS) the Q factor will be lower and the phase loss will occur
more gradually. As a result, the power stage phase will
not be as close to –180° at the crossover frequency and
less phase boost is required of the compensation network.
The LTC3115-2 error amplifier is designed to have a
fixed maximum bandwidth in order to provide rejection
of switching noise to prevent it from interfering with the
control loop. From a frequency domain perspective, this
can be viewed as an additional single pole as illustrated in
Figure 11. The nominal frequency of this pole is 300kHz.
For typical loop crossover frequencies below about 50kHz
the phase contributed by this additional pole is negligible.
However, for loops with higher crossover frequencies this
additional phase loss should be taken into account when
designing the compensation network.
1000mV +
FB
–
VC
LTC3115-2
RFILT
INTERNAL
VC
CFILT
31152 F11
Figure 11. Internal Loop Filter
31152fa
For more information www.linear.com/LTC3115-2
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