LTC3727LX-1_15 Datasheet, PDF (27/28 Pages) Linear Technology – High Efficiency, 2-Phase Synchronous Step-Down Switching Regulator

PACKAGE DESCRIPTIO
7.8 – 8.2
LTC3727LX-1
G Package
28-Lead Plastic SSOP (5.3mm)
(Reference LTC DWG # 05-08-1640)
1.25 ±0.12
9.90 – 10.50*
(.390 – .413)
28 27 26 25 24 23 22 21 20 19 18 17 16 15
5.3 – 5.7
7.40 – 8.20
(.291 – .323)
0.42 ±0.03
RECOMMENDED SOLDER PAD LAYOUT
5.00 – 5.60**
(.197 – .221)
0.65 BSC
1 2 3 4 5 6 7 8 9 10 11 12 13 14
2.0
(.079)
MAX
0° – 8°
0.09 – 0.25
(.0035 – .010)
0.55 – 0.95
(.022 – .037)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2.
DIMENSIONS
ARE
IN
MILLIMETERS
(INCHES)
3. DRAWING NOT TO SCALE
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED .152mm (.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
0.65
(.0256)
BSC
0.22 – 0.38
(.009 – .015)
TYP
0.05
(.002)
MIN
G28 SSOP 0204
5.50 ±0.05
4.10 ±0.05
3.50 REF
(4 SIDES)
3.45 ± 0.05
3.45 ± 0.05
UH Package
32-Lead Plastic QFN (5mm × 5mm)
(Reference LTC DWG # 05-08-1693)
0.70 ±0.05
5.00 ± 0.10
(4 SIDES)
PIN 1
TOP MARK
(NOTE 6)
0.75 ± 0.05
BOTTOM VIEW—EXPOSED PAD
R = 0.05
TYP
0.00 – 0.05
R = 0.115
TYP
PIN 1 NOTCH R = 0.30 TYP
OR 0.35 × 45° CHAMFER
31 32
0.40 ± 0.10
1
2
3.50 REF
(4-SIDES)
3.45 ± 0.10
3.45 ± 0.10
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
RECOMMENDED SOLDER PAD LAYOUT
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.200 REF
NOTE:
1. DRAWING PROPOSED TO BE A JEDEC PACKAGE OUTLINE
M0-220 VARIATION WHHD-(X) (TO BE APPROVED)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
0.25 ± 0.05
0.50 BSC
(UH32) QFN 0406 REV D
3727lx1fa
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