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LTC3727LX-1_15 Datasheet, PDF (20/28 Pages) Linear Technology – High Efficiency, 2-Phase Synchronous Step-Down Switching Regulator
LTC3727LX-1
APPLICATIO S I FOR ATIO
cycle applications may approach this minimum on-time
limit and care should be taken to ensure that
tON(MIN)
<
VOUT
VIN(f)
If the duty cycle falls below what can be accommodated by
the minimum on-time, the LTC3727LX-1 will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple voltage and current will increase.
The minimum on-time for the LTC3727LX-1 is generally
less than 200ns. However, as the peak sense voltage
decreases the minimum on-time gradually increases up to
about 300ns. This is of particular concern in forced
continuous applications with low ripple current at light
loads. If the duty cycle drops below the minimum on-time
limit in this situation, a significant amount of cycle skip-
ping can occur with correspondingly larger inductor cur-
rent and output voltage ripple.
FCB Pin Operation
The FCB pin can be used to regulate a secondary winding
or as a logic level input. Continuous operation is forced on
both controllers when the FCB pin drops below 0.8V.
During continuous mode, current flows continuously in
the transformer primary. The secondary winding(s) draw
current only when the bottom, synchronous switch is on.
When primary load currents are low and/or the VIN/VOUT
ratio is low, the synchronous switch may not be on for a
sufficient amount of time to transfer power from the
output capacitor to the secondary load. Forced continuous
operation will support secondary windings providing there
is sufficient synchronous switch duty factor. Thus, the
FCB input pin removes the requirement that power must
be drawn from the inductor primary in order to extract
power from the auxiliary windings. With the loop in
continuous mode, the auxiliary outputs may nominally be
loaded without regard to the primary output load.
The secondary output voltage VSEC is normally set as
shown in Figure 6 by the turns ratio N of the transformer:
VSEC ≅ (N + 1) VOUT
However, if the controller goes into Burst Mode operation
and halts switching due to a light primary load current,
then VSEC will droop. An external resistive divider from
20
VSEC to the FCB pin sets a minimum voltage VSEC(MIN):
VSEC(MIN)
≅
0.8V
⎛
⎝⎜
1+
R6 ⎞
R5 ⎠⎟
where R5 and R6 are shown in Figure 2.
If VSEC drops below this level, the FCB voltage forces
temporary continuous switching operation until VSEC is
again above its minimum.
In order to prevent erratic operation if no external connec-
tions are made to the FCB pin, the FCB pin has a 0.18µA
internal current source pulling the pin high. Include this
current when choosing resistor values R5 and R6.
The following table summarizes the possible states avail-
able on the FCB pin:
Table 2
FCB PIN
0V to 0.75V
0.85V < VFCB < 6.0V
Feedback Resistors
> 7.3V
CONDITION
Forced Continuous Both Controllers
(Current Reversal Allowed—
Burst Inhibited)
Minimum Peak Current Induces
Burst Mode Operation
No Current Reversal Allowed
Regulating a Secondary Winding
Burst Mode Operation Disabled
Constant Frequency Mode Enabled
No Current Reversal Allowed No
Minimum Peak Current
Voltage Positioning
Voltage positioning can be used to minimize peak-to-peak
output voltage excursions under worst-case transient
loading conditions. The open-loop DC gain of the control
loop is reduced depending upon the maximum load step
specifications. Voltage positioning can easily be added to
the LTC3727LX-1 by loading the ITH pin with a resistive
divider having a Thevenin equivalent voltage source equal
to the midpoint operating voltage range of the error
amplifier, or 1.2V (see Figure 8).
The resistive load reduces the DC loop gain while main-
taining the linear control range of the error amplifier. The
maximum output voltage deviation can theoretically be
reduced to half or alternatively the amount of output
capacitance can be reduced for a particular application. A
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