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LTC3727LX-1_15 Datasheet, PDF (18/28 Pages) Linear Technology – High Efficiency, 2-Phase Synchronous Step-Down Switching Regulator
LTC3727LX-1
APPLICATIO S I FOR ATIO
SENSE+/SENSE– Pins
The common mode input range of the current comparator
sense pins is from 0V to 14V. Continuous linear operation
is guaranteed throughout this range allowing output volt-
age setting from 0.8V to 14V. A differential NPN input
stage is biased with internal resistors from an internal
2.4V source as shown in the Functional Diagram. This
requires that current either be sourced or sunk from the
SENSE pins depending on the output voltage. If the output
voltage is below 2.4V current will flow out of both SENSE
pins to the main output. The output can be easily preloaded
by the VOUT resistive divider to compensate for the current
comparator’s negative input bias current. The maximum
current flowing out of each pair of SENSE pins is:
ISENSE+ + ISENSE– = (2.4V – VOUT)/24k
Since VOSENSE is servoed to the 0.8V reference voltage, we
can choose R1 in Figure 2 to have a maximum value to
absorb this current.
R1(MAX)
=
24k
⎛
⎝⎜
0.8V
2.4V – VOUT
⎞
⎠⎟
for VOUT < 2.4V
Regulating an output voltage of 1.8V, the maximum value
of R1 should be 32K. Note that for an output voltage above
2.4V, R1 has no maximum value necessary to absorb the
sense currents; however, R1 is still bounded by the
VOSENSE feedback current.
Soft-Start/Run Function
The RUN/SS1 and RUN/SS2 pins are multipurpose pins
that provide a soft-start function and a means to shut
down the LTC3727LX-1. Soft-start reduces the input
power source’s surge currents by gradually increasing the
controller’s current limit (proportional to VITH). This pin
can also be used for power supply sequencing.
An internal 1.2µA current source charges up the CSS
capacitor. When the voltage on RUN/SS1 (RUN/SS2)
reaches 1.5V, the particular controller is permitted to start
operating. As the voltage on RUN/SS increases from 1.5V
to 3.0V, the internal current limit is increased from 45mV/
RSENSE to 135mV/RSENSE. The output current limit ramps
up slowly, taking an additional 1.25s/µF to reach full
18
current. The output current thus ramps up slowly, reduc-
ing the starting surge current required from the input
power supply. If RUN/SS has been pulled all the way to
ground there is a delay before starting of approximately:
tDELAY
=
1.5V
1.2µA CSS
=
(1.25s
/
µF)CSS
tIRAMP
=
3V − 1.5V
1.2µA
CSS
=
(1.25s
/
µF)CSS
By pulling both RUN/SS pins below 1V, the LTC3727LX-1
is put into low current shutdown (IQ = 20µA). The RUN/SS
pins can be driven directly from logic as shown in Fig-
ure 7. Diode D1 in Figure 7 reduces the start delay but
allows CSS to ramp up slowly providing the soft-start
function. Each RUN/SS pin has an internal 6V zener clamp
(See Functional Diagram).
3.3V OR 5V
D1
RUN/SS
CSS
(7a)
RUN/SS
(7b)
CSS
3727LX1 F07
Figure 7. RUN/SS Pin Interfacing
Fault Conditions: Current Limit and Current Foldback
The LTC3727LX-1 current comparator has a maximum
sense voltage of 135mV resulting in a maximum MOSFET
current of 135mV/RSENSE. The maximum value of current
limit generally occurs with the largest VIN at the highest
ambient temperature, conditions that cause the highest
power dissipation in the top MOSFET.
The LTC3727LX-1 includes current foldback to help fur-
ther limit load current when the output is shorted to
ground. The foldback circuit is active even when the
overload shutdown latch described above is overridden. If
the output falls below 70% of its nominal output level, then
the maximum sense voltage is progressively lowered from
135mV to 45mV. Under short-circuit conditions with very
low duty cycles, the LTC3727LX-1 will begin cycle skip-
ping in order to limit the short-circuit current. In this
situation the bottom MOSFET will be dissipating most of
the power but less than in normal operation. The short-
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