LTC3727LX-1_15 Datasheet, PDF (24/28 Pages) Linear Technology – High Efficiency, 2-Phase Synchronous Step-Down Switching Regulator

LTC3727LX-1
APPLICATIO S I FOR ATIO
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3727LX-1. These items are also illustrated graphically
in the layout diagram of Figure 10; Figure 11 illustrates the
current waveforms present in the various branches of the
2-phase synchronous regulators operating in continuous
mode. Check the following in your layout:
1. Are the top N-channel MOSFETs M1 and M3 located
within 1cm of each other with a common drain connec-
tion at C_IN? Do not attempt to split the input decoupling
for the two channels as it can cause a large resonant loop.
2. Are the signal and power grounds kept separate? The
combined LTC3727LX-1 signal ground pin and the
ground return of C_INTVCC must return to the combined
C_OUT (–) terminals. The path formed by the top N-channel
MOSFET, Schottky diode and the C_IN capacitor should
have short leads and PC trace lengths. The output
capacitor (–) terminals should be connected as close as
possible to the (–) terminals of the input capacitor by
placing the capacitors next to each other and away from
the Schottky loop described above.
3. Do the LTC3727LX-1 V_OSENSE pins resistive dividers
connect to the (+) terminals of C_OUT? The resistive
divider must be connected between the (+) terminal of
C_OUT and signal ground. The R2 and R4 connections
should not be along the high current input feeds from
the input capacitor(s).
4. Are the SENSE ^– and SENSE ⁺ leads routed together with
minimum PC trace spacing? The filter capacitor be-
tween SENSE ⁺ and SENSE ^– should be as close as
possible to the IC. Ensure accurate current sensing with
Kelvin connections at the SENSE resistor.
5. Is the INTV_CC decoupling capacitor connected close to
the IC, between the INTV_CC and the power ground pins?
This capacitor carries the MOSFET drivers current
24
1
RUN/SS1
28
PGOOD
2 _SENSE1+
27
TG1
R2
R1
3 _SENSE1–
4
V_OSENSE1
5
PLLFLTR
f_IN
6
PLLIN
26
SW1
25
BOOST1
24
V_IN
23
BG1
INTV_CC
7
FCB
22
EXTV_CC
8
LTC3727LX-1
21
I_TH1
INTV_CC
9
SGND
20
PGND
10
3.3V
3.3V_OUT
19
BG2
11
I_TH2
18
BOOST2
R3
R4
12
V_OSENSE2
13 _SENSE2–
17
SW2
16
TG2
14 _SENSE2+
15
RUN/SS2
R_PU
V_PULL-UP
(<7V)
PGOOD
L1
R_SENSE
C_B1
M1
M2
D1
C_OUT1
R_IN
C_IN
C_VIN
V_IN
C_INTVCC
C_OUT2
D2
C_B2
M3
M4
R_SENSE
L2
3727LX1 F10
Figure 10. LTC3727LX-1 Recommended Printed Circuit Layout Diagram
V_OUT1
GND
V_OUT2
3727lx1fa