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LTC3859_15 Datasheet, PDF (26/42 Pages) Linear Technology – Low IQ, Triple Output, Buck/Buck/Boost Synchronous Controller
LTC3859
APPLICATIONS INFORMATION
VX(MASTER)
VOUT(SLAVE)
VX(MASTER)
VOUT(SLAVE)
TIME
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TIME
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7a. Coincident Tracking
7b. Radiometric Tracking
Figure 7. Two Different Modes of Output Voltage Tracking
VOUT
RB
LTC3859
VFB1,2
VX
RA
RTRACKB
RTRACKA
TRACK/SS1,2
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Figure 8. Using the TRACK/SS Pin for Tracking
Alternatively, the TRACK/SS1 and TRACK/SS2 pins for the
two buck controllers can be used to track two (or more) sup-
plies during start-up, as shown qualitatively in Figures 7a
and 7b. To do this, a resistor divider should be connected
from the master supply (VX) to the TRACK/SS pin of the
slave supply (VOUT), as shown in Figure 8. During start-up
VOUT will track VX according to the ratio set by the resis-
tor divider:
VX = RA • RTRACKA + RTRACKB
VOUT RTRACKA
RA + RB
For coincident tracking (VOUT = VX during start-up),
RA = RTRACKA
RB = RTRACKB
INTVCC Regulators
The LTC3859 features two separate internal P-channel
low dropout linear regulators (LDO) that supply power
26
at the INTVCC pin from either the VBIAS supply pin or the
EXTVCC pin depending on the connection of the EXTVCC
pin. INTVCC powers the gate drivers and much of the
LTC3859’s internal circuitry. The VBIAS LDO and the EXTVCC
LDO regulate INTVCC to 5.4V. Each of these can supply a
peak current of 50mA and must be bypassed to ground
with a minimum of 4.7μF ceramic capacitor. No matter
what type of bulk capacitor is used, an additional 1μF
ceramic capacitor placed directly adjacent to the INTVCC
and PGND IC pins is highly recommended. Good bypassing
is needed to supply the high transient currents required
by the MOSFET gate drivers and to prevent interaction
between the channels.
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the
maximum junction temperature rating for the LTC3859 to
be exceeded. The INTVCC current, which is dominated by
the gate charge current, may be supplied by either the VBIAS
LDO or the EXTVCC LDO. When the voltage on the EXTVCC
pin is less than 4.7V, the VBIAS LDO is enabled. Power
dissipation for the IC in this case is highest and is equal to
VBIAS • IINTVCC. The gate charge current is dependent
on operating frequency as discussed in the Efficiency
Considerations section. The junction temperature can be
estimated by using the equations given in Note 2 of the
Electrical Characteristics. For example, the LTC3859 INTVCC
current is limited to less than 40mA from a 40V supply
when not using the EXTVCC supply at a 70°C ambient
temperature in the QFN package:
TJ = 70°C + (40mA)(40V)(34°C/W) = 125°C
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