LTC3722-2_15 Datasheet, PDF (24/28 Pages) Linear Technology – Synchronous Dual Mode Phase Modulated Full Bridge Controllers

LTC3722-1/LTC3722-2
OPERATION
loop is very helpful tool to quickly evaluate the frequency
response of various compensation networks.
Polymer Electrolytic (see Figure 13) 1/(2πC_CR_I) sets a
low frequency pole. 1/(2πC_CR_F) sets the low frequency
zero. The zero frequency should coincide with the worst-
case lowest output pole frequency. The pole frequency
and mid frequency gain (R_F/R_I) should be set such so
that the loop crosses over zero dB with a –1 slope at a
frequency lower than (f_SW/8). Use a bode plot to graphi-
cally display the frequency response. An optional higher
frequency pole set by CP2 and R_f is used to attenuate
switching frequency noise.
Aluminum Electrolytic (see Figure 13) the goal of this
compensator will be to cross over the output minimum
pole frequency. Set a low frequency pole with C_C and R_IN
at a frequency that will cross over the loop at the output
pole minimum F, place the zero formed by C_C and R_f at
the output pole F.
V_OUT
C_P2
OPTIONAL
R_f
C_C
C_O ^RI
REF
R_L
–
COLL
ESR R_D
2.5V
+
LT1431 OR EQUIVALENT
PRECISION ERROR
AMP AND REFERENCE
V_OUT
OPTO
COMP
372212 F13
Figure 13. Compensation for Polymer Electrolytic
improve transient response, particularly overshoot, and
improve ZVS ability at light loads.
Programming the Synchronous Rectifier Turn-Off Delay
The LTC3722-1/LTC3722-2 controllers include a feature to
program the turn-off edge of the secondary side synchro-
nous rectifier MOSFETs relative to the beginning of a new
primary side power delivery pulse. This feature provides
optimized timing for the synchronous MOSFETs which
improves efficiency. At higher load currents it becomes
more advantageous to delay the turn-off of the synchro-
nous rectifiers until the transformer core has been reset
to begin the new power pulse. This allows for secondary
freewheeling current to flow through the synchronous
MOSFET channel instead of its body diode.
The turn-off delay is programmed with a resistor from
SPRG to GND (see Figure 14). The nominal regulated
voltage on SPRG is 2V. The external resistor programs a
current which flows out of SPRG. The delay can be adjusted
from approximately 20ns to 200ns, with resistor values of
10k to 200k. Do not leave SPRG floating. The amount of
delay can also be modulated based on an external current
source that sinks current out of SPRG. Care must be taken
to limit the current out of SPRG to 350µA or less.
SPRG
+
+
R_SPRG
V 2V
–
–
TURN-OFF
SYNC OUT
372212 F14
Synchronous Rectification
The LTC3722-1/LTC3722-2 produces the precise timing
signals necessary to control current doubler secondary side
synchronous MOSFETs on OUTE and OUTF. Synchronous
rectifiers are used in place of Schottky or Silicon diodes
on the secondary side of the power supply. As MOSFET
R_DS(ON) levels continue to drop, significant efficiency im-
provements can be realized with synchronous rectification,
provided that the MOSFET switch timing is optimized. An
additional benefit realized with synchronous rectifiers is
bipolar output current capability. These characteristics
Figure 14. Synchronous Delay Circuitry
Current Doubler
The current doubler secondary employs two output induc-
tors that equally share the output load current. The trans-
former secondary is not center-tapped. This configuration
provides 2x higher output current capability compared to
similarly sized single output inductor modules, hence the
name. Each output inductor is twice the inductance value
as the equivalent single inductor configuration and the
transformer turns ratio is one-half that of a single inductor
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