LTC3722-2_15 Datasheet, PDF (20/28 Pages) Linear Technology – Synchronous Dual Mode Phase Modulated Full Bridge Controllers

LTC3722-1/LTC3722-2
OPERATION
output current for the converter can be delivered at the
lowest expected V_IN. Use the following formula to calculate
the optimal value for R_CS. I_P equation valid for current
doubler secondary.
LTC3722-1:
R_CS
=
300m V
– (8 2 .5µ A • R_SLOPE )
I_P(PE AK)
I_P(PE AK) =
2
I_{O(M A X )}
• N • EFF
+ ^{VIN(MAX) • DMIN}
L_MAG • f _CLK • 2
+
V_O(1– D_MIN )
L_OUT • f _CLK • N
where :
N
=
Transformer
turns ratio
=
N_P
N_S
LTC3722-2:
R_CS
=
300mV
I_P (P E A K)
Current Transformer Sensing
A current sense transformer can be used in lieu of resistive
sensing with the LTC3722-1/LTC3722-2. Current sense
transformers are available in many styles from several
manufacturers. A typical sense transformer for this ap-
plication will use a 1:50 turns ratio (N), so that the sense
resistor value is N times larger, and the secondary current
N times smaller than in the resistive sense case. Therefore,
the sense resistor power loss is about N times less with
the transformer method, neglecting the transformers core
and copper losses. The disadvantages of this approach
include, higher cost and complexity, lower accuracy,
core reset/maximum duty cycle limitations and lower
speed. Nevertheless, for very high power applications,
this method is preferred. The sense transformer primary
is placed in the same location as the ground referenced
sense resistor, or between the upper MOSFET drains in
the (MA, MC) and V_IN.
The advantage of the high side location is a greater im-
munity to leading edge noise spikes, since gate charge
current and reflected rectifier recovery current are largely
eliminated. Figure 11 illustrates a typical current sense
transformer based sensing scheme. R_S in this case is
calculated the same as in the resistive case, only its value
is increased by the sense transformer turns ratio. At high
duty cycles, it may become difficult or impossible to re-
set the current transformer. This is because the required
transformer reset voltage increases as the available time
for reset decreases to equalize the (volt • seconds) applied.
The interwinding capacitance and secondary inductance of
the current sense transformer form a resonant circuit that
limits the dV/dT on the secondary of the CS transformer.
This, in turn, limits the maximum achievable duty cycle for
the CS transformer. Attempts to operate beyond this limit
will cause the transformer core to “walk” and eventually
saturate, opening up the current feedback loop.
Common methods to address this limitation include:
1. Reducing the maximum duty cycle by lowering the
power transformer turns ratio.
2. Reducing the switching frequency of the converter.
3. Employ external active reset circuitry.
4. Using two CS transformers summed together.
5. Choose a CS transformer optimized for high frequency
applications.
RAMP
R_SLOPE
CS
OPTIONAL
FILTERING
MB
SOURCE
N:1
MD
SOURCE
R_S
CURRENT
TRANSFORMER
372212 F11
Figure 11. Current Transformer Sense Circuitry
20
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372212fb