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LTC4012-3_15 Datasheet, PDF (21/28 Pages) Linear Technology – High Efficiency, Multi-Chemistry Battery Charger with PowerPath Control
LTC4012-3
Applications Information
The output capacitor shown across the battery and ground
must also absorb PWM output ripple current. The general
formula for this capacitor current is:
IRMS
=
0.29
•
VBAT • 1–
L1• fPWM
VBAT
VCLP
For example, IRMS = 0.22A with:
VBAT = 12.6V
VCLP = 19V
L1 = 10µH
fPWM = 550kHz
High capacity ceramic capacitors (20µF or more) available
from a variety of manufacturers can be used for input/out-
put capacitors. Other alternatives include OS-CON and
POSCAP capacitors from Sanyo.
Low ESR solid tantalum capacitors have high ripple cur-
rent rating in a relatively small surface mount package,
but exercise caution when using tantalum for input or
output bulk capacitors. High input surge current can be
created when the adapter is hot-plugged to the charger
or when a battery is connected to the charger. Solid tan-
talum capacitors have a known failure mechanism when
subjected to very high surge currents. Select tantalum
capacitors that have high surge current ratings or have
been surge tested.
EMI considerations usually make it desirable to minimize
ripple current in battery leads. Adding Ferrite beads or
inductors can increase battery impedance at the nominal
550kHz switching frequency. Switching ripple current splits
between the battery and the output capacitor in inverse
relation to capacitor ESR and the battery impedance. If
the ESR of the output capacitor is 0.2Ω and the battery
impedance is raised to 4Ω with a ferrite bead, only 5%
of the current ripple will flow to the battery.
Inductor Selection
Higher switching frequency generally results in lower ef-
ficiency because of MOSFET gate charge losses, but it allows
smaller inductor and capacitor values to be used. A primary
effect of the inductor value L1 is the amplitude of ripple
current created. The inductor ripple current ΔIL decreases
with higher inductance and PWM operating frequency:
∆IL
=
VBAT

• 1–

VBAT
VCLP



L1• fPWM
Accepting larger values of ΔIL allows the use of low in-
ductance, but results in higher output voltage ripple and
greater core losses. Lower charge currents generally call
for larger inductor values.
The LTC4012-3 limits maximum instantaneous peak in-
ductor current during every PWM cycle. To avoid unstable
switch waveforms, the ripple current must satisfy:
∆IL
<
2
•
150mV
RSENSE

– IMAX

so choose:
L1>
0.125 • VCLP
fPWM
•
 150mV
 RSENSE

– IMAX
For C-grade parts, a reasonable starting point for setting
ripple current is ΔIL = 0.4 • IMAX. For I-grade parts, use
ΔIL = 0.2 • IMAX only if the IC will actually be used to charge
batteries over the wider I-grade temperature range. The
voltage compliance of internal LTC4012-3 circuits also
imposes limits on ripple current. Select RIN (in Figure 1)
to avoid average current errors in high ripple designs. The
following equation can be used for guidance:
RSENSE • ∆IL
50µA
≤ RIN
≤
RSENSE • ∆IL
20µA
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