LTC3716 Datasheet, PDF (21/28 Pages) Linear Technology – 2-Phase, 5-Bit VID, Current Mode, High Efficiency, Synchronous Step-Down Switching Regulator

LTC3716
APPLICATIO S I FOR ATIO
In order to prevent erratic operation if no external connec-
tions are made to the FCB pin, the FCB pin has a 0.18µA
internal current source pulling the pin high. Include this
current when choosing resistor values R5 and R6.
The following table summarizes the possible states avail-
able on the FCB pin:
Table 2
FCB Pin
0V to 0.55V
0.65V < V_FCB < 4.3V (typ)
Feedback Resistors
>4.8V
Condition
Forced Continuous (Current Reversal
Allowed—Burst Inhibited)
Minimum Peak Current Induces
Burst Mode Operation
No Current Reversal Allowed
Regulating a Secondary Winding
Burst Mode Operation Disabled
Constant Frequency Mode Enabled
No Current Reversal Allowed
No Minimum Peak Current
Active Voltage Positioning
Active voltage positioning can be used to minimize peak-
to-peak output voltage excursion under worst-case tran-
sient loading conditions. The open-loop DC gain of the
control loop is reduced depending upon the maximum
load step specifications. Active voltage positioning can
easily be added to the LTC3716 by loading the I_TH pin with
a resistive divider having a Thevenin equivalent voltage
source equal to the midpoint operating voltage of the error
amplifier, or 1.2V (see Figure 8).
INTV_CC
R_T2
R_T1
I_TH
R_C
LTC3716
C_C
3716 F08
Figure 8. Active Voltage Positioning Applied to the LTC3716
The resistive load reduces the DC loop gain while main-
taining the linear control range of the error amplifier. The
worst-case peak-to-peak output voltage deviation due to
transient loading can theoretically be reduced to half or
alternatively the amount of output capacitance can
be reduced for a particular application. A complete
explanation is included in Design Solutions 10 or the
LTC1736 data sheet. (See www.linear-tech.com)
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3716 circuits: 1) I²R losses, 2) Topside
MOSFET transition losses, 3) INTV_CC regulator current
and 4) LTC3716 V_IN current (including loading on the
differential amplifier output).
1) I²R losses are predicted from the DC resistances of the
fuse (if used), MOSFET, inductor, current sense resistor,
and input and output capacitor ESR. In continuous mode
the average output current flows through L and R_SENSE,
but is “chopped” between the topside MOSFET and the
synchronous MOSFET. If the two MOSFETs have approxi-
mately the same R_DS(ON), then the resistance of one
MOSFET can simply be summed with the resistances of L,
R_SENSE and ESR to obtain I²R losses. For example, if each
R_DS(ON) = 10mΩ, R_L = 10mΩ, and R_SENSE = 5mΩ, then the
total resistance is 25mΩ. This results in losses ranging
from 2% to 8% as the output current increases from 3A to
15A per output stage for a 5V output, or a 3% to 12% loss
per output stage for a 3.3V output. Efficiency varies as the
inverse square of V_OUT for the same external components
and output power level. The combined effects of increas-
ingly lower output voltages and higher currents required
by high performance digital systems is not doubling but
quadrupling the importance of loss terms in the switching
regulator system!
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