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LTC3716 Datasheet, PDF (17/28 Pages) Linear Technology – 2-Phase, 5-Bit VID, Current Mode, High Efficiency, Synchronous Step-Down Switching Regulator
LTC3716
APPLICATIO S I FOR ATIO
OPTIONAL EXTVCC
CONNECTION
5V < VSEC < 7V
+
CIN
VIN
TG1
LTC3716
N-CH
EXTVCC
SW1
R6
FCB
R5
BG1
PGND
N-CH
VIN
1N4148
VSEC
+
1 RSENSE 2
T1 3
4
+
1µF
VOUT
COUT
3716 F05a
+
CIN
VIN
TG1
LTC3716
N-CH
EXTVCC
SW1
BG1
PGND
N-CH
VIN
BAT85
+
0.22µF
BAT85
VN2222LL
BAT85
1 RSENSE 2
L1 3
4
+
VOUT
COUT
3716 F05b
Figure 5a. Secondary Output Loop with EXTVCC Connection
Topside MOSFET Driver Supply (CB,DB) (Refer to
Functional Diagram)
External bootstrap capacitors CB1 and CB2 connected to
the BOOST1 and BOOST2 pins supply the gate drive
voltages for the topside MOSFETs. Capacitor CB in the
Functional Diagram is charged though diode DB from
INTVCC when the SW pin is low. When the topside MOSFET
turns on, the driver places the CB voltage across the gate-
source of the desired MOSFET. This enhances the MOSFET
and turns on the topside switch. The switch node voltage,
SW, rises to VIN and the BOOST pin rises to VIN + VINTVCC.
The value of the boost capacitor CB needs to be 30 to 100
times that of the total input capacitance of the topside
MOSFET(s). The reverse breakdown of DB must be greater
than VIN(MAX).
The final arbiter when defining the best gate drive ampli-
tude level will be the input supply current. If a change is
made that decreases input current, the efficiency has
improved. If the input current does not change then the
efficiency has not changed either.
Output Voltage
The LTC3716 has a true remote voltage sense capablity.
The sensing connections should be returned from the load
back to the differential amplifier’s inputs through a com-
mon, tightly coupled pair of PC traces. The differential
amplifier corrects for DC drops in both the power and
ground paths. The differential amplifier output signal is
Figure 5b. Capacitive Charge Pump for EXTVCC
divided down and compared with the internal precision
0.6V voltage reference by the error amplifier.
Output Voltage Programming
The output voltage is digitally programmed as defined in
Table 1 using the VID0 to VID4 logic input pins. The VID
logic inputs program a precision, 0.25% internal feedback
resistive divider. The LTC3716 has an output voltage
range of 0.6V to 1.75V in 25mV and 50mV steps.
Between the ATTENOUT pin and ground is a variable
resistor, R1, whose value is controlled by the five VID input
pins (VID0 to VID4). Another resistor, R2, between the
ATTENIN and the ATTENOUT pins completes the resistive
divider. The output voltage is thus set by the ratio of
(R1␣ +␣ R2) to R1.
Each VID digital input is pulled up by a 40k resistor in
series with a diode from VBIAS. Therefore, it must be
grounded to get a digital low input, and can be either
floated or connected to VBIAS to get a digital high input. The
series diode is used to prevent the digital inputs from
being damaged or clamped if they are driven higher than
VBIAS. The digital inputs accept CMOS voltage levels.
VBIAS is the supply voltage for the VID section. It is
normally connected to INTVCC but can be driven from
other sources. If it is driven from another source, that
source must be in the range of 2.7V to 5.5V and must be
alive prior to enabling the LTC3716.
17