LTC3675_15 Datasheet, PDF (19/38 Pages) Linear Technology – 7-Channel Configurable High Power PMIC

LTC3675/LTC3675-1
Operation
The gradation circuit will then ramp the current to the
programmed value at a rate determined by the gradation
rate bits. Once the LED driver reaches this value it will
regulate that current until programmed otherwise. If a
new value is programmed in the LED brightness register,
the LED driver’s current will ramp up or down at the pro-
grammed rate until that current is reached. To disable the
LED driver, a code of zero is programmed in the LED DAC
register. The gradation circuit will then ramp the current
down at the programmed rate. Once the current reaches
zero the gradation circuit will disable the boost and the
entire LED driver will enter shutdown mode.
The LED driver is protected by the LED_OV pin. This pin
acts as a secondary feedback path that limits the voltage
on the output capacitor. A feedback divider is placed from
the LED boost’s output to the LED_OV pin. Values for this
divider are selected to limit the output voltage similarly to
the feedback dividers discussed in “Switching Regulator
Output Voltage and Feedback Network” in the Applications
Information section. The LED driver begins to transition
to LED_OV control at 800mV and is fully controlled by
the LED_OV pin by 825mV. During this transition the LED
pins will begin to drop out of regulation. For this reason
during normal operation the voltage on this pin should be
kept below 800mV.
The LED driver is also designed to limit the maximum
voltage on the LED1 and LED2 pins to no more than 8V.
The boost regulates the minimum voltage on either LED
pin. If one of the LED pins is shorted to ground the boost
will only drive the other LED pin up to the voltage clamp, or
the LED_OV voltage, whichever is lower. If one LED string
is shorted, or partially shorted, this clamp will prevent the
boost from damaging the LED pin.
Pushbutton Interface and Power-Up Power-
Down Sequencing
The LTC3675/LTC3675-1 provide pushbutton functional-
ity to either power up or power down the part. The ONB,
WAKE and PBSTAT pins provide the user with flexibility
to power up or power down the part in addition to having
I²C control. All PB timing parameters are scaled using
the CT pin. Times described below apply to a nominal C_T
of 0.01µF.
The LTC3675/LTC3675-1 are in an off state when it is
powered up with all regulators in shutdown. The WAKE
pin is LOW in the off state. The WAKE pin will go HIGH
either if ONB is pulled LOW for 400ms or a regulator is
enabled via its enable pin or an I²C command. The WAKE
pin stays in its HIGH state for 5 seconds and then gets pulled
low. WAKE will not go HIGH again if a second regulator
is subsequently enabled. The LTC3675/LTC3675-1 are in
an on state if either the WAKE pin is HIGH or a regulator
is enabled.
The PBSTAT pin reflects the status of the ONB when the
LTC3675/LTC3675-1 are in an on state. Once in the on
state, the LTC3675/LTC3675-1 can be powered down
by holding ONB LOW for at least 5 seconds. All enabled
regulators will be turned off for 1 second and the contents
of the program registers are reset to their default state.
This manner of power-down is called a hard reset. A hard
reset may also be generated by using an I²C command.
Power-Up and Power-Down via Pushbutton
The LTC3675/LTC3675-1 may be turned on and off using
the WAKE pin as shown in Figures 2a and 2b. In Figures
2a and 2b, pressing ONB low at time t₁, causes the WAKE
pin to go high at time t₂ and stay high for 5 seconds, after
which WAKE is pulled low. WAKE going HIGH at t₂ causes
buck regulator 1 to power up, which sequentially powers
up the other buck regulators. The RSTB pin gets pulled
HIGH 200ms after the last enabled buck is in its PGOOD
state. An application showing sequential regulator start-up
is shown in the Typical Applications section (Figure 7).
If an I²C command is written before the 5 second WAKE
period t₃ to keep the buck regulators enabled, the regula-
tors stay enabled as shown in Figure 2b. Otherwise, when
WAKE gets pulled low at t₃, the buck regulators will also
power down sequentially as shown in Figure 2a.
In Figure 2b, ONB is held LOW at instant t₄ for 5 seconds.
This causes a hard reset to be generated and at t₅, all
regulators are powered down.
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