LT1010_06 Datasheet, PDF (16/20 Pages) Linear Technology – Fast ±150mA Power Buffer

LT1010
SCHE ATIC DIAGRA (Excluding protection circuits)
R6
15Ω
Q11
R7
300Ω
R5
1.5k
V⁺
R10
200Ω
Q18
BIAS
Q17
Q19
Q5
R2
R3
1k
1k
Q6
Q7
Q3
Q2
Q4
R4
1k
C1
30pF
Q8
Q12 R8
1k
Q15
Q13
R11
200Ω
Q21
Q20
R12
R14
3k
7Ω
OUTPUT
R13
200Ω
Q22
Q1
R1
4k
Q9
Q10
Q14
R9
4k
Q16
INPUT
V^–
1010 SD
DEFI ITIO OF TER S
Output Offset Voltage: The output voltage measured with
the input grounded (split supply operation).
Input Bias Current: The current out of the input terminal.
Large-Signal Voltage Gain: The ratio of the output volt-
age change to the input voltage change over the specified
input voltage range.*
Output Resistance: The ratio of the change in output
voltage to the change in load current producing it.*
Output Saturation Voltage: The voltage between the out-
put and the supply rail at the limit of the output swing
toward that rail.
Saturation Offset Voltage: The output saturation voltage
with no load.
Saturation Resistance: The ratio of the change in output
saturation voltage to the change in current producing it,
going from no load to full load.*
Slew Rate: The average time rate of change of output
voltage over the specified output range with an input step
between the specified limits.
Bias Terminal Voltage: The voltage between the bias
terminal and V⁺.
Supply Current: The current at either supply terminal with
no output loading.
*Pulse measurements (~1ms) as required to minimize thermal effects.
1010fc
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