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LT1010_06 Datasheet, PDF (13/20 Pages) Linear Technology – Fast ±150mA Power Buffer
LT1010
APPLICATIO S I FOR ATIO
High Current Booster
The circuit below uses a discrete stage to get 3A output
capacity. The configuration shown provides a clean, quick
way to increase LT1010 output power. It is useful for high
current loads such as linear actuator coils in disk drives.
The 33Ω resistors sense the LT1010’s supply current
with the grounded 100Ω resistor supplying a load for the
LT1010. The voltage drop across the 33Ω resistors
biases Q1 and Q2. Another 100Ω value closes a local
feedback loop, stabilizing the output stage. Feedback to
the LT1056 control amplifier is via the 10k value. Q3 and
Q4, sensing across the 0.18Ω units, furnish current
limiting at about 3.3A.
15pF
10k
15V
+
68pF 22µF
33Ω
Q3
2N3906
0.18Ω
1k
10k
INPUT
–
LT1056
+
Q1
MJE2955
LT1010
100Ω
100Ω
Q2
MJE3055
OUTPUT
33Ω
–15V
HEAT SINK OUTPUT TRANSISTORS
Q4
2N3904
22µF
1k
1010 AI17
0.18Ω
Wideband FET Input Stabilized Buffer
The figure below shows a highly stable unity-gain buffer
with good speed and high input impedance. Q1 and Q2
constitute a simple, high speed FET input buffer. Q1
functions as a source follower with the Q2 current source
load setting the drain-source channel current. The LT1010
buffer provides output drive capability for cables or
whatever load is required. Normally, this open-loop con-
figuration would be quite drifty because there is no DC
feedback. The LTC®1050 contributes this function to
stabilize the circuit. It does this by comparing the filtered
circuit output to a similarly filtered version of the input
5V
INPUT
Q1
2N5486
Q2
2N2222
10M 100Ω
–5V
10k
0.01µF
A A2
LT1010
–5V
4
B
OUTPUT
10M
0.1µF
3
6
A1
LTC1050
2
7
2000pF
5V
0.1µF
1k
1010 AI18
signal. The amplified difference between these signals is
used to set Q2’s bias, and hence, Q1’s channel current.
This forces Q1’s VGS to whatever voltage is required to
match the circuit’s input and output potentials. The 2000pF
capacitor at A1 provides stable loop compensation. The
RC network in A1’s output prevents it from seeing high
speed edges coupled through Q2’s collector-base junc-
tion. A2’s output is also fed back to the shield around Q1’s
gate lead, bootstrapping the circuit’s effective input ca-
pacitance down to less than 1pF.
Gain-Trimmable Wideband FET Amplifier
A potential difficulty with the previous circuit is that the
gain is not quite unity. The figure labeled A on the next
page maintains high speed and low bias while achieving
a true unity-gain transfer function.
This circuit is somewhat similar except that the Q2-Q3
stage takes gain. A2 DC stabilizes the input-output path
and A1 provides drive capability. Feedback is to Q2’s
emitter from A1’s output. The 1k adjustment allows the
gain to be precisely set to unity. With the LT1010, output
stage slew and full power bandwidth (1VP-P) are 100V/µs
and 10MHz respectively. – 3dB bandwidth exceeds 35MHz.
At A = 10 (e.g., 1k adjustment set at 50Ω), full power
bandwidth stays at 10MHz while the –3dB point falls to
22MHz.
With the optional discrete stage, slew exceeds 1000V/µs
and full power bandwidth (1VP-P) is 18MHz. – 3dB band-
width is 58MHz. At A = 10, full power is available to
10MHz, with the – 3dB point at 36MHz.
1010fc
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