LTC3404IMS8 Datasheet, PDF (15/16 Pages) Linear Technology – 1.4MHz High Efficiency Monolithic Synchronous Step-Down Regulator

TYPICAL APPLICATIO S
3- to 4-Cell NiCd/NiMH to 1.8V/0.5A Regulator Using All Ceramic Capacitors
LTC3404
1
RUN
8
PLL LPF
2
7
I_TH SYNC/MODE
47pF
3
6
V_FB
4
V_IN
5
4.7μH*
GND
SW
*TOKO D52LC A914BYW-4R7M
**TAIYO-YUDEN CERAMIC JMK325BJ226MM
***TAIYO-YUDEN CERAMIC LMK325BJ106MN
20pF 887k
698k
3404 TA04
C_OUT**
22μF
CER
V_OUT
1.8V
0.5A
V_IN
C_IN*** ^{2.7V TO 6V}
10μF
CER
Externally Synchronized 2.5V/0.6A Regulator Using All Ceramic Capacitors
LTC3404
1
RUN
8
PLL LPF
0.01μF
10k
2
7
I_TH SYNC/MODE
EXT CLOCK
47pF
3
6 ^1.7MHz
V_FB
V_IN
4
5 ^4.7μH*
GND
SW
20pF 887k
*TOKO D52LC A914BYW-4R7M
**TAIYO-YUDEN CERAMIC JMK325BJ226MM
***TAIYO-YUDEN CERAMIC LMK325BJ106MN
412k
3404 TA04
V_OUT
2.5V
C_OUT** _0.6A
22μF
CER
Low Noise 2.5V/0.3A Regulator
LTC3404
1
RUN
8
PLL LPF
47pF
2
7
I_TH SYNC/MODE
3
V_FB
6
V_IN
4
GND
5
SW
6.2μH*
*TOKO D63LCB A920CY-6R2M
**TAIYO-YUDEN CERAMIC JMK325BJ226MM
***TAIYO-YUDEN CERAMIC LMK325BJ106MN
20pF 887k
412k
3404 TA06
C_OUT**
22μF
CER
V_OUT
2.5V
0.3A
V_IN
C_IN*** ^{3V TO 6V}
10μF
CER
V_IN
C_IN*** ^{2.65V TO 6V}
10μF
CER
LTC3404
PACKAGE DESCRIPTIO
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660 Rev F)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
8 7 65
0.52
(.0205)
REF
0.889 ± 0.127
(.035 ± .005)
0.254
(.010)
DETAIL “A”
0° – 6° TYP
4.90 ± 0.152
(.193 ± .006)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
GAUGE PLANE
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
1 234
1.10
(.043)
MAX
0.86
(.034)
REF
0.42 ± 0.038
(.0165 ± .0015)
TYP
0.65
(.0256)
BSC
RECOMMENDED SOLDER PAD LAYOUT
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MS8) 0307 REV F
2. DRAWING NOT TO SCALE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
3404fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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