LTC3404IMS8 Datasheet, PDF (12/16 Pages) Linear Technology – 1.4MHz High Efficiency Monolithic Synchronous Step-Down Regulator

LTC3404
APPLICATIO S I FOR ATIO
very low load currents can be misleading since the actual
power lost is of no consequence as illustrated in Figure 6.
1. The V_IN quiescent current is due to two components:
the DC bias current as given in the electrical character-
istics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of
charge dQ moves from V_IN to ground. The resulting
dQ/dt is the current out of V_IN that is typically larger than
the DC bias current. In continuous mode, I_GATECHG =
f(Q_T + Q_B) where Q_T and Q_B are the gate charges of the
internal top and bottom switches. Both the DC bias and
gate charge losses are proportional to V_IN and thus
their effects will be more pronounced at higher supply
voltages.
2. I²R losses are calculated from the resistances of the
internal switches, R_SW, and external inductor R_L. In
continuous mode the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET R_DS(ON) and the duty cycle
(DC) as follows:
R_SW = (R_DS(ON)TOP)(DC) + (R_DS(ON)BOT)(1 – DC)
The R_DS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Charateristics
curves. Thus, to obtain I²R losses, simply add R_SW to
R_L and multiply the result by the square of the average
output current.
Other losses including C_IN and C_OUT ESR dissipative
losses and inductor core losses generally account for less
than 2% total additional loss.
Thermal Considerations
In most applications the LTC3404 does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3404 is running at high ambient tempera-
ture with low supply voltage and high duty cycles, such
as in dropout, the heat dissipated may exceed the maxi-
mum junction temperature of the part. If the junction
12
1
V_IN = 4.2V
L = 4.7μH
0.1
V_OUT = 1.5V
V_OUT = 2.5V
V_OUT = 3.3V
0.01 ^{Burst Mode OPERATION}
0.001
0.0001
0.00001
0.1
1
10
100
LOAD CURRENT (mA)
1000
3404 F06
Figure 6. Power Lost vs Load Current
temperature reaches approximately 175°C, both power
switches will be turned off and the SW node will become
high impedance.
To avoid the LTC3404 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
T_R = (P_D)(θ_JA)
where P_D is the power dissipated by the regulator and q_JA
is the thermal resistance from the junction of the die to the
ambient temperature.
The junction temperature, T_J, is given by:
T_J = T_A + T_R
where T_A is the ambient temperature.
As an example, consider the LTC3404 in dropout at an
input voltage of 3V, a load current of 500mA, and an
ambient temperature of 70°C. From the typical perfor-
mance graph of switch resistance, the R_DS(ON) of the
P-channel switch at 70°C is approximately 0.7Ω. There-
fore, power dissipated by the part is:
P_D = I_LOAD2 • R_DS(ON) = 0.175W
For the MSOP package, the θ_JA is 150°C/ W. Thus, the
junction temperature of the regulator is:
T_J = 70°C + (0.175)(150) = 96°C
3404fb