LTC3720_15 Datasheet, PDF (14/24 Pages) Linear Technology – Single Phase VRM8.5 Current Mode Step-Down Controller

LTC3720
APPLICATIO S I FOR ATIO
V_IN
OPTIONAL
EXTV_CC
CONNECTION
5V < V_SEC < 7V
TG
LTC3720
EXTV_CC SW
R4
FCB SENSE⁺
R3
SGND
BG
PGND
+ ^VIN
C_IN
1N4148
V_SEC
•
+ _CSEC
1µF
T1 ^• ₊
V_OUT
1:N
C_OUT
3720 F04
Figure 4. Secondary Output Loop and EXTV_CC Connection
Fault Conditions: Current Limit and Foldback
The maximum inductor current is inherently limited in a
current mode controller by the maximum sense voltage. In
the LTC3720, the maximum sense voltage is controlled by
the voltage on the V_RNG pin. With valley current control,
the maximum sense voltage and the sense resistance
determine the maximum allowed inductor valley current.
The corresponding output current limit is:
I_LIMIT
=
V_SNS(MAX)
R_DS(ON) ρ_T*
+
1
2
∆I_L
The current limit value should be checked to ensure that
I_LIMIT(MIN) > I_OUT(MAX). The minimum value of current limit
generally occurs with the largest V_IN at the highest ambi-
ent temperature, conditions that cause the largest power
loss in the converter. Note that it is important to check for
self-consistency between the assumed MOSFET junction
temperature and the resulting value of I_LIMIT which heats
the MOSFET switches.
Caution should be used when setting the current limit
based upon the R_DS(ON) of the MOSFETs. The maximum
current limit is determined by the minimum MOSFET on-
resistance. Data sheets typically specify nominal and
maximum values for R_DS(ON), but not a minimum. A
reasonable assumption is that the minimum R_DS(ON) lies
the same amount below the typical value as the maximum
lies above it. Consult the MOSFET manufacturer for further
guidelines.
To further limit current in the event of a short circuit to
ground, the LTC3720 includes foldback current limiting. If
the output falls by more than 25%, then the maximum
sense voltage is progressively lowered to about one sixth
of its full value.
Minimum Off-time and Dropout Operation
The minimum off-time t_OFF(MIN) is the smallest amount of
time that the LTC3720 is capable of turning on the bottom
MOSFET, tripping the current comparator and turning the
MOSFET back off. This time is generally about 350ns. The
minimum off-time limit imposes a maximum duty cycle of
t_ON/(t_ON + t_OFF(MIN)). If the maximum duty cycle is reached,
due to a dropping input voltage for example, then the
output will drop out of regulation. The minimum input
voltage to avoid dropout is:
V_IN(MIN)
=
V_OUT
t_ON
+ t_OFF(MIN)
t_ON
Output Voltage Programming
The output voltage is digitally set to levels between 1.05V
and 1.825V using the voltage identification (VID) inputs
VID0-VID4. An internal 5-bit DAC configured as a preci-
sion resistive voltage divider sets the output voltage in
increments according to Table 1. The VID codes are com-
patible with Intel VRM8.5 processor specifications. Each
VID input is pulled up by an internal 40k pull-up resistor
from the INTV_CC supply and includes a series diode to
prevent damage from VID inputs that exceed the supply.
INTV_CC Regulator
An internal P-channel low dropout regulator produces the
5V supply that powers the drivers and internal circuitry
within the LTC3720. The INTV_CC pin can supply up to
50mA RMS and must be bypassed to ground with a
minimum of 4.7µF low ESR capacitor. Good bypassing is
necessary to supply the high transient currents required
by the MOSFET gate drivers. Applications using large
MOSFETs with a high input voltage and high frequency of
*Use R_SENSE value if a sense resistor is connected between SENSE⁺ and SENSE^–.
3720f
14