LTC3720_15 Datasheet, PDF (10/24 Pages) Linear Technology – Single Phase VRM8.5 Current Mode Step-Down Controller

LTC3720
APPLICATIO S I FOR ATIO
The basic LTC3720 application circuit is shown in
Figure 1. External component selection is primarily de-
termined by the maximum load current and begins with
the selection of the sense resistance and power MOSFET
switches. The LTC3720 can use either a sense resistor or
the on-resistance of the synchronous power MOSFET for
determining the inductor current. The desired amount of
ripple current and operating frequency largely deter-
mines the inductor value. Finally, C_IN is selected for its
ability to handle the large RMS current into the converter
and C_OUT is chosen with low enough ESR to meet the
output voltage ripple and transient specification.
Maximum Sense Voltage and V_RNG Pin
Inductor current is determined by measuring the voltage
acrossasenseresistancethatappearsbetweenthe SENSE^–
and SENSE⁺ pins. The maximum sense voltage is set by
the voltage applied to the V_RNG pin and is equal to
approximately (0.133)V_RNG. The current mode control
loop will not allow the inductor current valleys to exceed
(0.133)V_RNG/R_SENSE. In practice, one should allow some
margin for variations in the LTC3720 and external compo-
nent values and a good guide for selecting the sense
resistance is:
R_SENSE
=
10
V_RNG
• I_OUT(MAX)
An external resistive divider from INTV_CC can be used to
set the voltage of the V_RNG pin between 0.5V and 2V
resulting in nominal sense voltages of 50mV to 200mV.
Additionally, the V_RNG pin can be tied to SGND or INTV_CC
in which case the nominal sense voltage defaults to 70mV
or 140mV, respectively. The maximum allowed sense
voltage is about 1.33 times this nominal value.
Connecting the SENSE⁺ and SENSE^– Pins
The LTC3720 can be used with or without a sense resistor.
When using a sense resistor, it is placed between the
source of the bottom MOSFET M2 and ground. Connect
the SENSE⁺ pin to the source of the bottom MOSFET and
the SENSE^– pin to PGND so that the resistor appears
between the SENSE⁺ and SENSE^– pins. Kelvin connec-
tions at the sense resistor ensure accurate current sens-
ing. Using a sense resistor provides a well defined current
limit, but adds cost and reduces efficiency. Alternatively,
one can eliminate the sense resistor and use the bottom
MOSFET as the current sense element by simply connect-
ing the SENSE⁺ pin to the switch node SW at the drain of
the bottom MOSFET and keep SENSE^– connected to
PGND. This improves efficiency, but one must carefully
choose the MOSFET on-resistance as discussed below.
Power MOSFET Selection
The LTC3720 requires two external N-channel power
MOSFETs, one for the top (main) switch and one for the
bottom (synchronous) switch. Important parameters for
the power MOSFETs are the breakdown voltage V_(BR)DSS,
threshold voltage V_(GS)TH, on-resistance R_DS(ON), reverse
transfer capacitance C_RSS and maximum current I_DS(MAX).
The gate drive voltage is set by the 5V INTV_CC supply.
Consequently, logic-level threshold MOSFETs must be
used in LTC3720 applications. If the input voltage is
expected to drop below 5V, then sub-logic level threshold
MOSFETs should be considered.
When the bottom MOSFET is used as the current sense
element, particular attention must be paid to its on-
resistance. MOSFET on-resistance is typically specified
with a maximum value R_DS(ON)(MAX) at 25°C. In this case,
additional margin is required to accommodate the rise in
MOSFET on-resistance with temperature:
R_DS(ON)(MAX)
=
R_SENSE
ρ_T
The ρ_T term is a normalization factor (unity at 25°C)
accounting for the significant variation in on-resistance
with temperature, typically about 0.4%/°C as shown in
Figure 2. For a maximum temperature of 100°C, using a
value ρ_T = 1.3 is reasonable.
The power dissipated by the top and bottom MOSFETs
strongly depends upon their respective duty cycles and
3720f
10