LTC3720_15 Datasheet, PDF (13/24 Pages) Linear Technology – Single Phase VRM8.5 Current Mode Step-Down Controller

LTC3720
APPLICATIO S I FOR ATIO
This formula has a maximum at V_IN = 2V_OUT, where
I_RMS = I_OUT(MAX)/ 2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief. Note that ripple
current ratings from capacitor manufacturers are often
based on only 2000 hours of life which makes it advisable
to derate the capacitor.
The selection of C_OUT is primarily determined by the ESR
required to minimize voltage ripple and load step
transients. The output ripple ∆V_OUT is approximately
bounded by:
∆V_OUT
≤

∆I_{L}ESR +
1
8fC _OUT


Since ∆I_L increases with input voltage, the output ripple is
highest at maximum input voltage. Typically, once the ESR
requirement is satisfied, the capacitance is adequate for
filtering and has the necessary RMS current rating.
Multiple capacitors placed in parallel may be needed to
meet the ESR and RMS current handling requirements.
Dry tantalum, special polymer, aluminum electrolytic and
ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density
but it is important to only use types that have been surge
tested for use in switching power supplies. Aluminum
electrolytic capacitors have significantly higher ESR, but
can be used in cost-sensitive applications providing that
consideration is given to ripple current ratings and long
term reliability. Ceramic capacitors have excellent low
ESR characteristics but can have a high voltage coefficient
and audible piezoelectric effects. The high Q of ceramic
capacitors with trace inductance can also lead to signifi-
cant ringing. When used as input capacitors, care must be
taken to ensure that ringing from inrush currents and
switching does not pose an overvoltage hazard to the
power switches and controller. To dampen input voltage
transients, add a small 5µF to 50µF aluminum electrolytic
capacitor with an ESR in the range of 0.5Ω to 2Ω. High
performance through-hole capacitors may also be used,
but an additional ceramic capacitor in parallel is recom-
mended to reduce the effect of their lead inductance.
Top MOSFET Driver Supply (C_B, D_B)
An external bootstrap capacitor C_B connected to the BOOST
pin supplies the gate drive voltage for the topside MOSFET.
This capacitor is charged through diode D_B from INTV_CC
when the switch node is low. When the top MOSFET turns
on, the switch node rises to V_IN and the BOOST pin rises
to approximately V_IN + INTV_CC. The boost capacitor needs
to store about 100 times the gate charge required by the
top MOSFET. In most applications a 0.1µF to 0.47µF X5R
or X7R dielectric capacitor is adequate.
Discontinuous Mode Operation and FCB Pin
The FCB pin determines whether the bottom MOSFET
remains on when current reverses in the inductor. Tying
this pin above its 0.8V threshold enables discontinuous
operation where the bottom MOSFET turns off when
inductor current reverses. The load current at which
current reverses and discontinuous operation begins de-
pends on the amplitude of the inductor ripple current and
will vary with changes in V_IN. Tying the FCB pin below the
0.8V threshold forces continuous synchronous operation,
allowing current to reverse at light loads and maintaining
high frequency operation.
In addition to providing a logic input to force continuous
operation, the FCB pin provides a means to maintain a
flyback winding output when the primary is operating in
discontinuous mode. The secondary output V_SEC is nor-
mally set as shown in Figure 4 by the turns ratio N of the
transformer. However, if the controller goes into discon-
tinuous mode and halts switching due to a light primary
load current, then V_SEC will droop. An external resistor
divider from V_SEC to the FCB pin sets a minimum voltage
V_SEC(MIN) below which continuous operation is forced
until V_SEC has risen above its minimum.
V_SEC(MIN)
=

0.8V_1+
R4^
R3
3720f
13