LTC3709 Datasheet, PDF (14/24 Pages) Linear Technology – Fast 2-Phase, No RSENSE Synchronous DC/DC Controller with Tracking/Sequencing

LTC3709
APPLICATIO S I FOR ATIO
used to vary the on-time to achieve frequency locking and
180° phase separation.
The synchronization is set up in a “daisy chain” manner
whereby channel 2’s on-time will be varied with respect to
channel 1. If an external clock is present, then channel 1’s
on-time will be varied and channel 2 will follow suit. Both
PLLs are set up with the same capture range and the fre-
quency range that the LTC3709 can be externally synchro-
nized to is between 2 • f_C and 0.5 • f_C, where f_C is the initial
frequency setting of the two channels. It is advisable to set
initial frequency as close to external frequency as possible.
A limitation of both PLLs is when the on-time is close to the
minimum (100ns). In this situation, the PLL will not be
able to synchronize up in frequency.
To ensure proper operation of the internal phase-lock loop
when no external clock is applied to the FCB pin, the
INTLPF pin may need to be pulled down while the output
voltage is ramping up. One way to do this is to connect the
anode of a silicon diode to the INTLPF pin and its cathode
to the PGOOD pin and connect a pull-up resistor between
the PGOOD pin and V_CC. Refer to Figure 9 for an example.
Inductor Selection
Given the desired input and output voltages, the inductor
value and operating frequency determine the ripple current:
∆I_L
=
⎛⎝⎜
V_OUT
f •L
⎞⎠⎟ ⎛⎝⎜_1–
V_OUT
V_IN
⎞
⎠⎟
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Highest efficiency operation is obtained at low
frequency with small ripple current. However, achieving
this requires a large inductor. There is a tradeoff between
component size, efficiency and operating frequency.
A reasonable starting point is to choose a ripple current
that is about 40% of I_OUT(MAX)/2. Note that the largest
ripple current occurs at the highest V_IN. To guarantee that
ripple current does not exceed a specified maximum, the
inductance should be chosen according to:
L
=
⎛
⎝⎜
f
•
V_OUT
∆I_L(MAX)
⎞⎛
⎠⎟ ⎝⎜^1–
V_OUT ^⎞
V_{IN(MAX) ⎠⎟}
Once the value for L is known, the inductors must be
selected (based on the RMS saturation current ratings). A
variety of inductors designed for high current, low voltage
applications are available from manufacturers such as
Sumida, Toko and Panasonic.
Schottky Diode Selection
The Schottky diodes conduct during the dead time be-
tween the conduction of the power MOSFET switches. It is
intended to prevent the body diode of the bottom MOSFET
from turning on and storing charge during the dead time,
which causes a modest (about 1%) efficiency loss. The
diode can be rated for about one-half to one-fifth of the full
load current since it is on for only a fraction of the duty
cycle. In order for the diode to be effective, the inductance
between the diode and the bottom MOSFET must be as
small as possible, mandating that these components be
placed adjacently. The diode can be omitted if the effi-
ciency loss is tolerable.
C_IN and C_OUT Selection
In continuous mode, the current of each top N-channel
MOSFET is a square wave of duty cycle V_OUT/V_IN. A low
ESR input capacitor sized for the maximum RMS current
must be used. The details of a close form equation can be
found in Application Note 77. Figure 2 shows the input
capacitor ripple current for a 2-phase configuration with
the output voltage fixed and input voltage varied. The input
ripple current is normalized against the DC output current.
The graph can be used in place of tedious calculations. The
minimum input ripple current can be achieved when the
input voltage is twice the output voltage.
3709f
14