LTC3709 Datasheet, PDF (13/24 Pages) Linear Technology – Fast 2-Phase, No RSENSE Synchronous DC/DC Controller with Tracking/Sequencing

LTC3709
APPLICATIO S I FOR ATIO
2.0
1.5
1.0
0.5
0
– 50
0
50
100
150
JUNCTION TEMPERATURE (°C)
3709 F01
Figure 1. R_DS(ON) vs Temperature
The power dissipated by the top and bottom MOSFETs
strongly depends upon their respective duty cycles and
the load current. When the LTC3709 is operating in
continuous mode, the duty cycles for the MOSFETs are:
D_TOP
=
V_OUT
V_IN
D_BOT
=
V_IN
– V_OUT
V_IN
The maximum power dissipation in the MOSFETs per
channel is:
P_TOP
=
D_TOP
•
⎛
⎝⎜
I_OUT(MAX)
2
⎞
⎠⎟
2
•
ρ_T(TOP)
•
R_DS(ON)(MAX)
+
(0.5) •
V_IN2
•
⎛⎝⎜
I_OUT
2
⎞⎠⎟
•
C_RSS
•
f
•
( ) ^⎛
R_{DS(ON)_DRV ⎜}
⎝
1
DRV_CC – V_GS(TH)
1^⎞
+
V_GS(TH)
⎟
⎠
P_BOT
=
D_BOT
•
⎛
⎝⎜
I_OUT(MAX)
2
⎞
⎠⎟
2
•
ρ_T(BOT)
•
R_DS(ON)(MAX)
Both top and bottom MOSFETs have I²R losses and the top
MOSFET includes an additional term for transition losses,
which are the largest at maximum input voltages. The
bottom MOSFET losses are the greatest when the bottom
duty cycle is near 100%, during a short circuit or at high
input voltage. A much smaller and much lower input
capacitance MOSFET should be used for the top MOSFET
in applications that have an output voltage that is less than
1/3 of the input voltage. In applications where V_IN >> V_OUT,
the top MOSFETs’ “on” resistance is normally less impor-
tant for overall efficiency than its input capacitance at
operating frequencies above 300kHz. MOSFET manufac-
turers have designed special purpose devices that provide
reasonably low “on” resistance with significantly reduced
input capacitance for the main switch application in switch-
ing regulators.
Operating Frequency
The choice of operating frequency is a tradeoff between
efficiency and component size. Low frequency operation
improves efficiency by reducing MOSFET switching losses
but requires larger inductance and/or capacitance to main-
tain low output ripple voltage.
The operating frequency of LTC3709 applications is deter-
mined implicitly by the one-shot timer that controls the on
time, t_ON, of the top MOSFET switch. The on-time is set by
the current into the I_ON pin according to:
t_ON
=
0.7
I_ION
(^30pF)
Tying a resistor from V_IN to the I_ON pin yields an on-time
inversely proportional to V_IN. For a down converter, this
results in approximately constant frequency operation as
the input supply varies:
f
=
0.7
V_OUT
• R_ON(30pF₎
PLL and Frequency Synchronization
In the LTC3709, there are two on-chip phase-lock loops
(PLLs). One of the PLLs is used to achieve frequency
locking and phase separation between the two channels
while the second PLL is for locking onto an external clock.
Since the LTC3709 is a constant on-time architecture, the
error signal generated by the phase detector of the PLL is
3709f
13