LTC3118_15 Datasheet, PDF (14/38 Pages) Linear Technology – 18V, 2A Buck-Boost DC/DC Converter with Low-Loss Dual Input PowerPath

LTC3118
Operation
UVLO COMPARATORS
V_IN2
2V
RUN2
1.22V
V_CC
+
2.35V _–
+
–
+
–
V_CCGOOD
RUN1
+
1.22V _–
V_IN1
+
2V _–
V2GD
V_IN2GOOD
V_IN1GOOD
V1GD
3118 F02
SEL PIN
1
IDEAL
DIODE
MODE
0
PRIORITY
MODE
INPUT VOLTAGE SELECT LOGIC
V_IN1GOOD
1
1
0
0
V_IN2GOOD
1
0
1
0
SELECTED V_IN
Highest V_IN
V_IN1
V_IN2
No Switching
1
1
V_IN1
1
0
V_IN1
0
1
V_IN2
0
0
No Switching
Figure 2. Simplified Input Select Logic and V_IN Power Good Indicators
If SEL is a logic low, the LTC3118 operates in V_IN1 priority
mode where V_IN1 is selected for operation if conditions
are met for V_IN1GOOD to be high. If V_IN1GOOD is low in
priority mode, the LTC3118 will revert to V_IN2 operation
if V_IN2(GOOD) is asserted, keeping V_OUT powered.
If SEL is a logic high, the LTC3118 operates in ideal diode
mode, where V_OUT is powered from the highest input
voltage source with a high V_INGOOD signal. An internal
comparator with 400mV hysteresis monitors the input
voltages to determine which is higher. If the state of this
comparator changes during PWM operation, switching
will be suspended for six clock cycles before resuming
from the other input source. An approximate 250µs filter/
time constant prevents rapid transitions between inputs.
As with priority mode, if one of the V_INGOOD signals is low
the LTC3118 will operate from the other input in order to
keep the output powered. If both V_INGOOD signals are low
in either mode, the LTC3118 will not deliver power to V_OUT.
V_OUT Power Good Indicator
The V_OUT power good indicator is an open-drain output
pin similar to the V1GD and V2GD pins shown in Figure 2.
PGD is driven by an internal comparator that monitors the
FB pin. If FB is below 0.92V (V_OUT is 8% low) PGD will open
circuit, allowing an external resistor to pull high indicating
the output voltage is not in regulation. The power good
comparator has internal filtering for glitch suppression.
3118f
14
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