LTC3118_15 Datasheet, PDF (10/38 Pages) Linear Technology – 18V, 2A Buck-Boost DC/DC Converter with Low-Loss Dual Input PowerPath

LTC3118
Pin Functions (QFN/TSSOP)
BST1 (Pin 16/Pin 22): Bootstrapped floating supply for
high side N-channel MOSFET gate drive for V_IN1 or V_IN2.
Connect to SW1 through a 0.1µF capacitor, as close to
the part as possible. This capacitor provides gate drive
for the N-channel MOSFETs connected between SW1 and
either V_IN1 or V_IN2.
SW1 (Pin 17/Pin 23): Switch Pin. Connect to one side of
the inductor. Keep PCB trace lengths as short and wide
as possible to reduce EMI.
V_IN2 (Pin 18/Pin 24): The second input voltage source for
the converter. Connect a minimum of 22µF ceramic decou-
pling capacitor from this pin to ground, as close to the IC
as possible. In ideal diode mode (SEL = 1), this input will
be selected if V_IN2 > V_IN1, V_IN2 is above its internal UVLO
threshold, and RUN2 > 1.22V. In priority mode (SEL = 0),
this input will only be selected if V_IN1 is below its internal
UVLO threshold or RUN1 < 1.05V.
Since this input has the higher R_DS(ON) MOSFETs between
V_IN2 and SW1, it should be considered for use with the
source where slightly lower conversion efficiency is ac-
ceptable.
CP2 (Pin 19/Pin 25): Positive pin for the V_IN2 top N-channel
MOSFET charge-pump capacitor. This pin toggles between
V_IN2 and V_IN2 + V_CC when V_IN2 is active.
CN2 (Pin 20/Pin 27): Negative pin for the V_IN2 top
N-channel MOSFET charge-pump capacitor. This pin is
driven between V_CC and GND when V_IN2 is active. Connect
a 10nF ceramic capacitor between CN2 and CP2. This pin
can be monitored to indicate operation from V_IN2.
CM2 (Pin 21/Pin 28): Filter pin for the common connec-
tion of V_IN2 to SW1 N-channel MOSFETs. Connect a 47nF
capacitor from this pin to the ground plane.
CM1 (Pin 22/Pin 1): Filter pin for the common connec-
tion of V_IN1 to SW1 N-channel MOSFETs. Connect a 47nF
capacitor from this pin to the ground plane.
CN1 (Pin 23/Pin 2): Negative pin for the V_IN1 top N-channel
MOSFET charge-pump capacitor. This pin is driven be-
tween V_CC and GND when V_IN1 is active. Connect a 10nF
ceramic capacitor between CN1 and CP1. This pin can be
monitored to indicate operation from V_IN1.
CP1 (Pin 24/Pin 3): Positive pin for the V_IN1 top N-channel
MOSFET charge-pump capacitor. This pin toggles between
V_IN1 and V_IN1 + V_CC when V_IN1 is active.
PGND (Exposed Pad Pin 25/Pins 17, 18, 26, Exposed Pad
Pin 29): Power Ground for the IC. The exposed pad must
be soldered to the PCB ground plane. It serves as the
power ground connection, and as a means of conducting
heat away from the die.
3118f
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