LTC3646-1_15 Datasheet, PDF (12/28 Pages) Linear Technology – 40V, 1A Synchronous Step-Down Converter

LTC3646/LTC3646-1
APPLICATIONS INFORMATION
Ferrite designs exhibit very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core materials saturate “hard,” meaning the inductance
collapses abruptly when the peak design current is
exceeded. This collapse will result in an abrupt increase
in inductor ripple current, so it is important to ensure the
core will not saturate.
Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
Toroidal or shielded pot cores in ferrite or permalloy
materials are small and don’t radiate much energy but
generally cost more than powdered iron core inductors
with similar characteristics. The choice of which style
inductor to use mainly depends on the price versus size
requirements and any radiated field/EMI requirements.
New designs for surface mount inductors are available
from Toko, Vishay, NEC/Tokin, Cooper, Coilcraft, TDK and
Würth Electronik. Table 1 gives a sampling of available
surface mount inductors.
Table 1. Inductor Selection
INDUCTANCE DCR MAX CURRENT DIMENSIONS
(µH)
(mΩ)
(A)
(mm)
Würth Elektronik, TPC MH, L, LH Series
3.3 (MH)
35
1.8
4.8 × 4.8
3.9 (L)
55
2.1
5.8 × 5.8
6.2 (LH)
45
1.7
5.8 × 5.8
Sumida, CDRH3d23/HP Series
1.2
40
3.5
3.92 × 3.92
3.3
70
2.2
3.92 × 3.92
TDK, SLF10145 Series
22
59
2.1
10.1 × 10.1
33
82
1.6
10.1 × 10.1
Coilcraft MSS7341 Series
10
32
1.64
7.3 × 7.3
15
47
1.36
7.3 × 7.3
HEIGHT
(mm)
2.8
1.8
2.8
2.5
2.5
4.5
4.5
4.1
4.1
C_IN and C_OUT Selection
The input capacitance, C_IN, is needed to filter the trapezoi-
dal wave current at the drain of the top power MOSFET.
To prevent large voltage transients from occurring a low
ESR input capacitor sized for the maximum RMS current
is recommended. The maximum RMS current is given by:
( ) _{IRMS = IOUT(MAX)}
V_OUT V_IN − V_OUT
V_IN
This formula has a maximum at V_IN = 2V_OUT, where I_RMS
= I_OUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do
not offer much relief. Note that ripple current ratings from
capacitor manufacturers are often based on only 2000
hours of life which makes it advisable to further derate
the capacitor or choose a capacitor rated at a higher
temperature than required.
Several capacitors may be paralleled to meet the require-
ments of the design. For low input voltage applications
sufficient bulk input capacitance is needed to minimize
transient effects during output load changes. Even though
the LTC3646 design includes an overvoltage protection
circuit, care must always be taken to ensure input voltage
transients do not pose an overvoltage hazard to the part.
The selection of C_OUT is primarily determined by the effec-
tive series resistance (ESR) that is required to minimize
voltage ripple and load step transients. The output ripple,
ΔV_OUT, is determined by:
∆V_OUT
<
∆I_L

ESR +

8
•
f_O
1
• C_OUT



When using low-ESR ceramic capacitors, it is more useful
to choose the output capacitor value to fulfill a charge stor-
age requirement. During a load step, the output capacitor
must instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
loop to respond is dependent on the compensation and the
output capacitor size. Typically, 3 to 4 cycles are required
to respond to a load step, but only in the first cycle does
the output drop linearly. The output droop, V_DROOP, is
usually about 3 times the linear drop of the first cycle.
12
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