LTC3541-1 Datasheet, PDF (10/20 Pages) Linear Technology – High Efficiency Buck + VLDO Regulator

LTC3541-1
U
OPERATIO
tions. The LTC3541-1 will be reset upon the detection of
either event. The N-channel MOSFET incorporated in the
VLDO has its drain connected to the LV_IN pin as shown
in Figure 1. To ensure reliable operation, the LV_IN voltage
must be stable before the VLDO is enabled. For the case
where the voltage on the LV_IN pin is supplied by the buck
regulator, the internal power supply sequencing logic as-
sures voltages are applied in the appropriate manner. For
the case where an external supply is used to power the
LV_IN pin, the voltage on the LV_IN pin must be stable before
the ENVLDO pin is brought from a low to a high. Further,
the external LV_IN voltage must be reduced in conjunction
with V_IN whenever V_IN is pulled low or removed.
The linear regulator is designed to provide a lower output
current (30mA) than that available from the VLDO. The
linear regulator’s output pass transistor has its drain tied
to the V_IN rail. This allows the linear regulator to be turned
on prior to, and independent of, the buck regulator which
would ordinarily drive the VLDO in a typical application.
The linear regulator is provided with thermal protection that
is designed to disable the linear regulator function when
the output pass transistor’s junction temperature reaches
approximately 160°C. In addition to thermal protection,
short-circuit detection is provided to disable the linear
regulator function when a short-circuit condition is sensed.
This circuit is designed such that an output current of
approximately 120mA can be provided before this circuit
will trigger. As detailed in the Electrical Characteristics,
the linear regulator will be out of regulation when this
event occurs. Both the thermal and short-circuit faults are
treated as catastrophic fault conditions. The LTC3541-1
will be reset upon the detection of either event.
The N-channel MOSFET incorporated in the linear regulator
has its drain connected to the V_IN pin as shown in Figure 1.
The size of this MOSFET and its associated power bussing
is designed to accommodate 30mA of DC current. Currents
above this can be supported for short periods as stipulated
in the Absolute Maximum Ratings section.
Transitioning from linear regulator mode to VLDO mode,
accomplished by bringing ENBUCK from a logic low to a
logic high while ENVLDO is a logic high, is designed to be
as seamless and transient free as possible. The precise
transient response of LV_OUT due to this transition is a
function of C_OUT and the load current. Waveforms given
in the Typical Performance Characeristics show typical
transient responses using the minimum C_OUT of 2.2µF and
load currents of 1mA and 30mA respectively. Generally, the
amplitude of any transients present will decrease as C_OUT
is increased. To ensure reliable operation and adherence
to the load regulation limits presented in the Electrical
Characteristics table, the load current must not exceed
the linear regulator I_OUT limit of 30mA within 20ms after
ENBUCK has transitioned to a logic high. The 300mA I_OUT
limit of VLDO applies thereafter. Further, for configurations
that do not use the LTC3541-1’s buck regulator to provide
the VLDO input voltage (LV_IN), the user must ensure a
stable LV_IN voltage is present no less than 1ms prior to
ENBUCK transitioning to a logic high.
In a similar manner, transitioning from VLDO mode to
linear regulator mode, accomplished by bringing ENBUCK
from a logic highto a logic low while ENVLDO is a logic
high, is designed to be as seamless and transient free as
possible. Again, the precise transient response of LV_OUT
due to this transition is a function of C_OUT and the load
current. Waveforms given in the Typical Performance
Characeristics show typical transient responses using
the minimum C_OUT of 2.2µF and load currents of 1mA
and 30mA respectively. Generally, the amplitude of any
transients present will decrease as C_OUT is increased. To
ensure reliable operation and adherence to the load regula-
tion limits presented in the Electrical Characterstics table,
the load current must not exceed the linear regulator I_OUT
limit of 30mA 1ms prior to ENBUCK transitioning to a logic
low and thereafer. Further, for configurations that do not
use the LTC3541-1’s buck regulator to provide the VLDO
input voltage (LV_IN), the user must continue to ensure a
stable LV_IN voltage no less than 1ms after ENBUCK has
transitioned to a logic low.
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