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PDT006A0X3-SRZ Datasheet, PDF (31/39 Pages) Lineage Power Corporation – 6A Digital Pico DLynxTM: Non-Isolated DC-DC Power Modules 3Vdc ––14.4Vdc input; 0.45Vdc to 5.5Vdc output; 6A Output Current
Preliminary Data Sheet
October 17, 2011
6A Digital Pico DLynxTM: Non-isolated DC-DC Power Modules
3 –– 14.4Vdc input; 0.45Vdc to 5.5Vdc output; 6A output current
Hex
Code
A4
D0
D4
D5
D6
Command
MFR_VOUT_MIN
MFR_SPECIFIC_00
VOUT_CAL_OFFSET
VOUT_CAL_GAIN
VIN_CAL_OFFSET
Table 6 (continued)
Brief Description
Returns the minimum output voltage possible from the module (read only)
Format
Linear, two’’s complement binary
Bit Position
7
6
5
4
3
2
1
0
Access
r
r
r
r
r
r
r
r
Function
Exponent
Mantissa
Default Value 0
0
0
0
0
0
1
0
Bit Position
7
6
5
4
3
2
1
0
Access
r
r
r
r
r
r
r
r
Function
Mantissa
Default Value 0
1
1
0
0
1
1
0
Returns module name information (read only)
Format
Unsigned Binary
Bit Position
7
6
5
4
3
2
Access
r
r
r
r
r
r
Function
Reserved
Default Value 1
1
1
0
1
0
Bit Position
7
6
5
4
3
2
Access
r
r
r
r
r
r
Function
Module Name
Default Value 0
0
0
1
1
0
1
0
r
r
0
0
1
0
r
r
Reserved
1
0
Applies an offset to the READ_VOUT command results to calibrate out offset
errors in module measurements of the output voltage (between -125mV and
+124mV)
Format
Linear, two’’s complement binary
Bit Position
7
6
5
4
3
2
1
0
Access
r/w r
r
r
r
r
r
r
Function
Mantissa
Default Value V
0
0
0
0
0
0
0
Bit Position
7
6
5
4
3
2
1
0
Access
r/w r/w r/w r/w r/w r/w r/w r/w
Function
Mantissa
Default Value V V V V V V V V
Applies a gain correction to the READ_VOUT command results to calibrate out
gain errors in module measurements of the output voltage (between -0.125 and
0.121)
Format
Linear, two’’s complement binary
Bit Position
7
6
5
4
3
2
1
0
Access
r
r
r
r
r
r
r r/w
Function
Exponent
Mantissa
Default Value 1
1
0
0
0
0
0
V
Bit Position
7
6
5
4
3
2
1
0
Access
r/w r/w r/w r/w r/w r/w r/w r/w
Function
Mantissa
Default Value V V V V V V V V
Applies an offset correction to the READ_VIN command results to calibrate out
offset errors in module measurements of the input voltage (between -2V and
+1.968V)
Format
Linear, two’’s complement binary
Bit Position
7
6
5
4
3
2
1
0
Access
r
r
r
r r/w r
r r/w
Function
Exponent
Mantissa
Default Value 1
1
0
1
V
0
0
V
Bit Position
7
6
5
4
3
2
1
0
Access
r
r r/w r/w r/w r/w r/w r/w
Function
Mantissa
Default Value 0
0
V
V
V
V
V
V
Non-Volatile
Memory
Storage
YES
YES
YES
YES
YES
LINEAGE POWER
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