W2350EP Datasheet, PDF (6/12 Pages) Keysight Technologies – High Speed Digital Design

Channel Simulator
Signal integrity engineers need to
determine ultralow bit error rate
(BER) contours for thousands of
points in the design space in order
to select the optimum set of char-
acteristics for transmitter, channel,
and receiver. Even with multicore
and modern linear algebra, transient
simulation still takes a prohibitively
long time: more than a day for a mil-
lion bits.
To meet this need, we’ve added
Channel Simulator that eliminates the
need for long, transient simulations.
It takes advantage of the fact that the
traces, vias, bond wires, connectors,
etc. of the channel are linear and
time invariant (“LTI”). This fact lets
you avoid the brute force approach of
running the transient solver at every
time step. You can determine ultralow
BER contours in seconds not days.
This enables very rapid and complete
‘what if’ design space exploration.
And you can accelerate batch-mode
parameter sweeps even further with
our distributed computing option,
the W2312 Transient Convolution
Distributed Computing 8-pack.
The table below compares the pros
and cons of traditional transient with
Channel Simulator in Bit-by-bit and
Statistical modes. Please see our
white paper “Explore the SerDes
design space using the IBIS AMI
channel simulation flow” for more
details.
http://literature.cdn.keysight.com/litweb/
pdf/5991-0894EN.pdf
Comparison of traditional transient with channel simulator in bit-by-bit and statistical modes
Transient
(SPICE-like)
Simulator
Channel Simulator,
Bit-by-bit mode
Channel Simulator,
Statistical mode
Method
Modified nodal analysis
of Kirchoff’s current laws for
every time step
Bit-by-bit superposition
of differentiated step responses
Statistical calculations
based on differentiated step
response
Applicability
– Linear and non-linear
channels
– Finite, user-speciied
bit pattern
– Adaptive or ixed
equalizer taps
– LTI channels plus a pre-
standard extension that al-
lows non-linear mid-channel
electrical and optoelectronic
repeaters.
– Finite, user-speciied
bit pattern
– Adaptive or ixed
equalizer taps
– Linear (impulse response)
and non-linear (“GetWave”)
AMI Tx and Rx models
– LTI channels
– Stochastic props of
ininite bit pattern
– Fixed equalizer taps
– AMI Tx and Rx LTI impulse
response models
BER loor in one
~10^–3
minute simulation
~10^–6
~10^–16
Typical megabit
simulation time
25 hours
12 minutes
40 seconds
Figure 5. Pass-fail plot from the DDR3
compliance histogram measurements for
DQ overshoot area
6