English
Language : 

W2350EP Datasheet, PDF (4/12 Pages) Keysight Technologies – High Speed Digital Design
Transient Convolution Simulator
At today’s multigigabit per second
chip-to-chip data rates, traditional
SPICE-like lumped element compo-
nents are not enough. High-frequency
and distributed effects such as
impedance mismatch, reflections,
crosstalk, skin effect, and dielectric
loss come into play.
Accordingly, signal integrity engineers
need to go beyond traditional SPICE.
ADS Transient Convolution Element
accommodates not only lumped-
element models but also the distrib-
uted transmission line, S-parameter,
and EM models that are essential to
model high-speed PCB traces. The
Transient Convolution Element is
unique in that it is not simply a high
performance point tool, but a set of
capabilities integrated into the ADS
platform. You can combine channel-,
circuit-, or EM-level models – each at
the appropriate level of abstraction –
into one simulation.
Figure 3. PCI Express Gen 2 eye diagram density contours with mask
Transient Convolution Element contains not only Transient
Simulator but also many more capabilities for signal integrity
including:
Multicore processor support and a
new, high-capacity sparse matrix
solver achieve a three-fold simulation
speed improvement for traditional
transient simulations and make this
the industry’s fastest signal integrity
circuit simulator. And if you need
even more speed you can add one
or both of our hardware accelerators
that use NVIDIA GPU cards (W2500)
and compute clusters (W2312).
– Patented convolution method to create causal and passive time-domain
models from S-parameters. Unlike other tools, ADS Convolution handles
challenging cases such a long or lossy transmission lines correctly. For
analysis of power distribution networks (PDNs), the hybrid impulse/rational
function mode yields the ultra ine frequency from DC to multigigahertz
– Channel Simulator with Bit-by-bit and Statistical modes (full details below)
Eye Probe component that delivers eye diagram analysis including BER
contour and bathtub display
– Eye mask utility with automatic violation checking
– Equalizer support with automatic tap optimization
– Ability to check cross-talk with multiple aggressors each at different data
rates
– Memory bus compliance tool for the DDR2 and DDR3 standard
– Incorporate transceiver models complying with the IBIS I/O industry-stan-
dard (ANSI/EIA-656), including SerDes models built with the algorithmic
modeling interface (AMI)
– Time-Domain Relectometry tool
– Jitter decomposition using the proven EZJIT Plus algorithm used in Keysight
instruments
– Broadband SPICE Model Generator, which lets you convert measured or
simulated S-parameter models to lumped equivalent or pole zero representa-
tions
4