C0603C104J3RECAUTO Datasheet, PDF (7/18 Pages) Kemet Corporation – Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
ESD, C0G Dielectric, 25 – 200 VDC (Commercial & Automotive Grade)
Table 4 – Land Pattern Design Recommendations per IPC–7351
EIA
Size
Code
Metric
Size
Code
Density Level A:
Maximum (Most)
Land Protrusion (mm)
Density Level B:
Median (Nominal)
Land Protrusion (mm)
C
Y
X V1 V2 C
Y
X V1 V2
Without Flexible Termination
Density Level C:
Minimum (Least)
Land Protrusion (mm)
C
Y
X V1 V2
0603
1608 0.90 1.15 1.10 4.00 2.10 0.80 0.95 1.00 3.10 1.50 0.60 0.75 0.90 2.40 1.20
With Flexible Termination
0603
1608 0.85 1.25 1.10 4.00 2.10 0.75 1.05 1.00 3.10 1.50 0.65 0.85 0.90 2.40 1.20
Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reflow
solder processes. KEMET only recommends wave soldering of EIA 0603, 0805 and 1206 case sizes.
Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reflow solder processes.
Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform
qualification testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).
V1
Y
Y
X
X
V2
C
C
Grid Placement Courtyard
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C1091_C0G_ESD • 12/5/2016 7