813N252I-09_15 Datasheet, PDF (2/23 Pages) Integrated Device Technology – VCXO Jitter Attenuator & FemtoClock Multiplier

Block Diagram
Loop
Filter
813N252I-09 Datasheet
PDSEL_[2:0] ^Pullup
CLK0 ^Pulldown
nCLK0 ^PU/PD
CLK1 ^Pulldown
nCLK1 ^PU/PD
CLK_SEL ^Pulldown
25MHz
VCXO Input
0
Pre-Divider
000 = 1
Phase
Detector
001 = 193
VCXO
010 = 256
1 011 = 2430
Charge
Pump
100 = 3125
101 = 9720
110 = 15625
VCXO Feedback Divider
÷3125
111 = 19440
(default)
VCXO Jitter Attenuation PLL
FemtoClock PLL
625MHz
Output Divider
00 = 25 (default)
01 = 5
10 = 4
11 = 2
2 _Pulldown
QA
nQA
ODASEL_[1:0]
Output Divider
00 = 25 (default)
01 = 5
10 = 4
11 = 2
2 _Pulldown
QB
nQB
ODBSEL_[1:0]
©2015 Integrated Device Technology, Inc.
2
Revision C, December 10, 2015