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813N252I-09_15 Datasheet, PDF (18/23 Pages) Integrated Device Technology – VCXO Jitter Attenuator & FemtoClock Multiplier
3. Calculations and Equations.
The purpose of this section is to calculate the power dissipation for the LVPECL output pairs.
LVPECL output driver circuit and termination are shown in Figure 7.
VCCO
813N252I-09 Datasheet
Q1
VOUT
RL
50Ω
VCCO - 2V
Figure 7. LVPECL Driver Circuit and Termination
To calculate power dissipation per output due to loading, use the following equations which assume a 50 load, and a termination voltage of
VCCO – 2V.
• For logic high, VOUT = VOH_MAX = VCCO_MAX – 0.75V
(VCCO_MAX – VOH_MAX) = 0.75V
• For logic low, VOUT = VOL_MAX = VCCO_MAX – 1.6V
(VCCO_MAX – VOL_MAX) = 1.6V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(VOH_MAX – (VCCO_MAX – 2V))/RL] * (VCCO_MAX – VOH_MAX) = [(2V – (VCCO_MAX – VOH_MAX))/RL] * (VCCO_MAX – VOH_MAX) =
[(2V – 0.75V)/50] * 0.75V = 18.75mW
Pd_L = [(VOL_MAX – (VCCO_MAX – 2V))/RL] * (VCCO_MAX – VOL_MAX) = [(2V – (VCCO_MAX – VOL_MAX))/RL] * (VCCO_MAX – VOL_MAX) =
[(2V – 1.6V)/50] * 1.6V = 12.80mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 31.55mW
©2015 Integrated Device Technology, Inc.
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Revision C, December 10, 2015