IS64LV25616AL Datasheet, PDF (9/14 Pages) Integrated Silicon Solution, Inc – 256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY

IS64LV25616AL
ISSI ^®
AC WAVEFORMS
WRITE CYCLE NO. 1 (CE Controlled, OE is HIGH or LOW) ^{(1 )}
1
t WC
ADDRESS
t SA
VALID ADDRESS
t SCE
t HA
2
CE
t AW
WE
t PWE1
t PWE2
3
t PBW
UB, LB
t HZWE
t LZWE
4
DOUT
DATA UNDEFINED
HIGH-Z
DIN
t SD
t HD
DATAIN VALID
5
UB_CEWR1.eps
6 ^Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least one of
the LB and UB inputs being in the LOW state.
2. WRITE = (CE) [ (LB) = (UB) ] (WE).
WRITE CYCLE NO. 2 (WE Controlled. OE is HIGH During Write Cycle) ^(1,2)
7
ADDRESS
OE
t WC
VALID ADDRESS
t HA
CE LOW
WE
t SA
UB, LB
DOUT
DATA UNDEFINED
DIN
t AW
t PWE1
t PBW
t HZWE
HIGH-Z
t LZWE
t SD
t HD
DATAIN VALID
UB_CEWR2.eps
8
9
10
11
12
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
9
Rev. D
07/05/06