IS64LV25616AL Datasheet, PDF (6/14 Pages) Integrated Silicon Solution, Inc – 256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY

IS64LV25616AL
ISSI ^®
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
-10
-12
Min. Max. Min. Max.
Unit
tRC
Read Cycle Time
10 —
12 —
ns
tAA
Address Access Time
— 10
— 12
ns
tOHA
Output Hold Time
tACE
CE Access Time
tDOE
OE Access Time
2—
2—
ns
— 10
— 12
ns
—4
—5
ns
tHZOE⁽²⁾
tLZOE⁽²⁾
tHZCE⁽²
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
—4
—5
ns
0—
0—
ns
04
06
ns
tLZCE⁽²⁾
CE to Low-Z Output
3—
3—
ns
tBA
tHZB⁽²⁾
tLZB⁽²⁾
LB, UB Access Time
LB, UB to High-Z Output
LB, UB to Low-Z Output
—4
—5
ns
03
04
ns
0—
0—
ns
tPU
Power Up Time
0—
0—
ns
tPD
Power Down Time
— 10
— 12
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to 3.0V
and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage.
AC TEST LOADS
3.3V
319 Ω
OUTPUT
30 pF
Including
jig and
scope
Figure 1
353 Ω
3.3V
319 Ω
OUTPUT
5 pF
Including
jig and
scope
Figure 2
353 Ω
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing and Reference Level
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
6
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. D
07/05/06