IS62WV51216ALL Datasheet, PDF (8/16 Pages) Integrated Silicon Solution, Inc – 512K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

IS62WV51216ALL, IS62WV51216BLL
ISSI ^®
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol
Parameter
45 ns
55 ns
70 ns
Min. Max.
Min. Max.
Min. Max.
Unit
tRC
Read Cycle Time
45
—
55
—
70
—
ns
tAA
Address Access Time
—
45
—
55
—
70
ns
tOHA
Output Hold Time
10
—
10
—
10
—
ns
tACS1/tACS2
CS1/CS2 Access Time
—
45
—
55
—
70
ns
tDOE
OE Access Time
—
20
—
25
—
35
ns
tHZOE⁽²⁾
OE to High-Z Output
—
15
—
20
—
25
ns
tLZOE⁽²⁾
OE to Low-Z Output
5
—
5
—
5
—
ns
t t HZCS1/ HZCS2⁽²⁾ CS1/CS2 to High-Z Output
0
15
0
20
0
25
ns
t t LZCS1/ LZCS2⁽²⁾ CS1/CS2 to Low-Z Output
10
—
10
—
10
—
ns
tBA
LB, UB Access Time
—
45
—
55
—
70
ns
tHZB
LB, UB to High-Z Output
0
15
0
20
0
25
ns
tLZB
LB, UB to Low-Z Output
0
—
0
—
0
—
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4 to
VDD-0.2V/0.4V to VDD-0.3V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC WAVEFORMS
READ CYCLE NO. 1^(1,2) (Address Controlled) (CS1 = OE = VIL, CS2 = WE = VIH, UB or LB = VIL)
ADDRESS
DQ0-D15
tRC
tAA
tOHA
PREVIOUS DATA VALID
tOHA
DATA VALID
8
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
02/24/05