IS62LV1288LL Datasheet, PDF (5/10 Pages) Integrated Silicon Solution, Inc – 128K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM

IS62LV1288LL
ISSI ^®
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
tRC Read Cycle Time
tAA Address Access Time
tOHA Output Hold Time
tACE1 CE1 Access Time
tACE2 CE2 Access Time
tDOE OE Access Time
tLZOE⁽²⁾ OE to Low-Z Output
tHZOE⁽²⁾ OE to High-Z Output
tLZCE1⁽²⁾ CE1 to Low-Z Output
tLZCE2⁽²⁾ CE2 to Low-Z Output
tHZCE⁽²⁾ CE1 or CE2 to High-Z Output
-45
-55
-70
Min.
Max.
Min.
Max.
Min.
Max.
Unit
45
—
55
—
70
—
ns
—
45
—
55
—
70
ns
10
—
10
—
10
—
ns
—
45
—
55
—
70
ns
—
45
—
55
—
70
ns
—
20
—
25
—
35
ns
0
—
5
—
5
—
ns
0
15
0
20
0
25
ns
5
—
7
—
10
—
ns
5
—
7
—
10
—
ns
0
15
0
20
0
25
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.3V, input pulse levels of 0.4V to 2.2V and
output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0.4V to 2.2V
5 ns
1.3V
See Figures 1 and 2
AC TEST LOADS
3.0V
1213 Ω
OUTPUT
30 pF
Including
jig and
scope
Figure 1.
1378 Ω
3.0V
1213 Ω
OUTPUT
5 pF
Including
jig and
scope
Figure 2.
1378 Ω
Integrated Silicon Solution, Inc. — 1-800-379-4774
5
Rev. A
03/22/01