IS66WVE2M16EALL Datasheet, PDF (4/31 Pages) Integrated Silicon Solution, Inc – Asynchronous and page mode interface

IS66/67WVE2M16EALL/BLL/CLL
Signal Descriptions
All signals for the device are listed below in Table 1.
Table 1. Signal Descriptions
Symbol
VSS
VSSQ
DQ0~DQ15
A0~A20
LB#
UB#
CE#
OE#
WE#
ZZ#
Type
Power Supply
Power Supply
Input / Output
Input
Input
Input
Input
Input
Input
Input
Description
All VSS supply pins must be connected to Ground
All VSSQ supply pins must be connected to Ground
Data Inputs/Outputs (DQ0~DQ15)
Address Input(A0~A20)
Lower Byte select
Upper Byte select
Chip Enable/Select
Output Enable
Write Enable
Sleep enable : When ZZ# is LOW, the CR can be loaded, or the device
can enter one of two low-power modes ( DPD or PAR).
 ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V
 BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V
 CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V
Rev. 0D | November 2014
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