IS61WV25616EDBLL-10TLI-TR Datasheet, PDF (3/14 Pages) Integrated Silicon Solution, Inc – 256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH ECC

IS61/64WV25616EDBLL
PIN CONFIGURATIONS
44-Pin LQFP*
48-Pin mini BGA (6mm x 8mm)
1 23 45 6
CE
I/O0
I/O1
I/O2
I/O3
VDD
GND
I/O4
I/O5
I/O6
I/O7
44 43 42 41 40 39 38 37 36 35 34
1
33
2
32
3
31
4
30
5
29
6
TOP VIEW
28
7
27
8
26
9
25
10
24
11
23
12 13 14 15 16 17 18 19 20 21 22
I/O15
I/O14
I/O13
I/O12
GND
VDD
I/O11
I/O10
I/O9
I/O8
NC
A
LB OE A0
A1
A2 N/C
B
I/O8 UB
A3
A4 CE I/O₀
C
I/O9 I/O10 A5
A6 I/O1 I/O2
D
GND I/O₁₁ A17 A7 I/O₃ VDD
E
VDD I/O12 NC A16 I/O4 GND
F
I/O14 I/O₁₃ A14 A15 I/O5 I/O₆
G
I/O15 NC A12 A13 WE I/O₇
H
NC A8
A9 A10 A11 NC
*LQFP package under evaluation.
PIN DESCRIPTIONS
A0-A17
Address Inputs
I/O0-I/O15
CE
OE
WE
LB
UB
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
NC
No Connection
Vdd
Power
GND
Ground
1
2
3
4
5
6
7
8
9
10
11
12
Integrated Silicon Solution, Inc. — www.issi.com
3
Rev. A
09/29/2011