IS61SPD25632T Datasheet, PDF (2/22 Pages) Integrated Silicon Solution, Inc – 256K x 32, 256K x 36, 512K x 18 SYNCHRONOUS PIPELINE, DOUBLE-CYCLE DESELECT STATIC RAM

IS61SPD25632T/D IS61LPD25632T/D
IS61SPD25636T/D IS61LPD25636T/D
IS61SPD51218T/D IS61LPD51218T/D
BLOCK DIAGRAM
CLK
ADV
ADSC
ADSP
A18-A0
(61SPD51218,
61LPD51218)
A17-A0
(61SPD25632/36,
61LPD25632/36)
18/19
MODE
CLK
Q0 _A0
A0'
BINARY
COUNTER
CE
Q1 _A1
A1'
CLR
D
Q
ADDRESS
REGISTER
CE
CLK
16/17
256Kx32; 256Kx36;
512Kx18
MEMORY ARRAY
18/19
32, 36,
or 18
32, 36,
or 18
ISSI ^®
GW
BWE
BWd
(x32/x36)
BWc
(x32/x36)
BWb
(x32/x36/x18)
BWa
(x32/x36/x18)
(T, D) CE
(T, D) CE2
(T) CE2
D _DQd Q
BYTE WRITE
REGISTERS
CLK
D _DQc Q
BYTE WRITE
REGISTERS
CLK
D _DQb Q
BYTE WRITE
REGISTERS
CLK
D _DQa Q
BYTE WRITE
REGISTERS
CLK
D
Q
ENABLE
REGISTER
CE
CLK
4
INPUT
REGISTERS
CLK
OUTPUT
REGISTERS
CLK
32, 36,
or 18
DQa - DQd
OE
OE
2
D
Q
ENABLE
DELAY
REGISTER
CLK
Integrated Silicon Solution, Inc. — 1-800-379-4774
PRELIMINARY INFORMATION Rev. 00A
04/17/01