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IS61QDB22M36 Datasheet, PDF (12/27 Pages) Integrated Silicon Solution, Inc – 72 Mb (2M x 36 & 4M x 18) QUAD (Burst of 2) Synchronous SRAMs
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372 Mb (2M x 36 & 4M x 18)
QUAD (Burst of 2) Synchronous SRAMs
ISSI ®
Capacitance (TA = 0 to + C, VDD = 1.8V -5%, +5%, f = 1MHz)
Parameter
Symbol
Test Condition
Input capacitance
Data-in capacitance (D0–D35)
Data-out capacitance (Q0–Q35)
Clocks Capacitance (K, K, C, C)
CIN
CDIN
COUT
VIN = 0V
VDIN = 0V
VOUT = 0V
Maximum
4
4
4
Units
pF
pF
pF
DC Electrical Characteristics (TA = 0 to + 70C, VDD = 1.8V -5%, +5%)
Parameter
Symbol
Minimum Maximum Units
Notes
x36 average power supply operating current
(IOUT = 0, VIN = VIH or VIL)
IDD33
IDD40
IDD50
—
—
800
700
mA
1, 3
600
x18 average power supply operating current
(IOUT = 0, VIN = VIH or VIL)
IDD33
IDD40
IDD50
—
800
—
700
mA
600
Power supply standby current
(R = VIH, W = VIH. All other inputs = VIH or VIH, IIH = 0)
Input leakage current, any input (except JTAG)
(VIN = VSS or VDD)
Output leakage current
(VOUT = VSS or VDDQ, Q in High-Z)
Output “high” level voltage (IOH = -6mA)
Output “low” level voltage (IOL = +6mA)
JTAG leakage current
(VIN = VSS or VDD)
ISB
—
200
mA
ILI
-2
+2
uA
ILO
-2
+2
uA
VOH
VOL
VDDQ -0.4
VDDQ
V
VSS
VSS+0.4
V
ILIJTAG
-100
+100
uA
1. IOUT = chip output current.
2. Minimum impedance output driver.
3. The numeric suffix indicates the part operating at speed, as indicated in AC Characteristics on page 15, 16
4. JEDEC Standard JESD8-6 Class 1 compatible.
5. For JTAG inputs only.
1, 3
1
2, 4
2, 4
5
12
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
05/14/09
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