IS61LV256AL_09 Datasheet, PDF (1/12 Pages) Integrated Silicon Solution, Inc – 32K x 8 LOW VOLTAGE CMOS STATIC RAM

IS61LV256AL
32K x 8 LOW VOLTAGE
CMOS STATIC RAM
AUGUST 2009
FEATURES
• High-speed access times:
— 10 ns
• Automatic power-down when chip is deselected
• CMOS low power operation
— 60 µW (typical) CMOS standby
— 65 mW (typical) operating
• TTL compatible interface levels
• Single 3.3V power supply
• Fully static operation: no clock or refresh
required
• Three-state outputs
• Lead-free available
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION
The ISSI IS61LV256AL is a very high-speed, low power,
32,768-word by 8-bit static RAM.It is fabricated using ISSI's
high-performance CMOS technology. This highly reliable
process coupled with innovative circuit design techniques,
yields access times as fast as 8 ns maximum.
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation is reduced to
150 µW (typical) with CMOS input levels.
Easy memory expansion is provided by using an active
LOW Chip Enable (CE).The active LOWWrite Enable (WE)
controls both writing and reading of the memory.
The IS61LV256AL is available in the JEDEC standard
28-pin, 300-mil SOJ and the 450-mil TSOP (Type I) pack-
ages.
A0-A14
VDD
GND
I/O0-I/O7
DECODER
I/O
DATA
CIRCUIT
32K X 8
MEMORY ARRAY
COLUMN I/O
CE
OE
CONTROL
CIRCUIT
WE
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on
any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — 1-800-379-4774
1
Rev.  C
07/29/09