X9279_09 Datasheet, PDF (9/18 Pages) Intersil Corporation – Single Digitally-Controlled (XDCP™) Potentiometer

X9279
SCL
SDA
0 101
S ^{ID3 ID2 ID1 ID0}
T
A
R
Device ID
T
0 A2 A1 A0
Internal
Address
00
A _{I3 I2 I1 I0} RB RA P1 P0 A S
C
CT
K
KO
Instruction _Register
Pot/Bank ^P
Opcode
Address
Address
These commands only valid when P1 = P0 = 0
FIGURE 3. TWO-BYTE INSTRUCTION SEQUENCE
SCL
SDA
0 1 0 10
S ID3 ID2 ID1 ID0 0 _{A2 A1 A0} A I3 _I2 I1 _I0 RB RA P1 P0 A D7 D6 D5 D4 D3 D2 D1 D0 A S
T
C
C
CT
A
R
Device ID
External ^K
Instruction
Register ^{Pot/Bank K}
WCR[7:0] valid only when P1 = P0 = 0;
K
O
P
T
Address
Opcode
Address ^Address
or
Data Register D[7:0] for all values of P1 and P0
FIGURE 4. THREE-BYTE INSTRUCTION SEQUENCE
SCL
SDA
0101 0
ID3 ID2 ID1 ID0
S
T
A
Device ID
R
0 A2 A1 A0
External
Address
A ^{I3 I2 I1 I0 RB RA P1 P0 A I}
C
K
Instruction
CN
Register Pot/Bank ^{K C}
1
Opcode
Address Address
I
N
C
2
T
FIGURE 5. INCREMENT/DECREMENT INSTRUCTION SEQUENCE
ID
NE
CC
n1
DS
ET
CO
nP
INC/DEC
CMD
ISSUED
SCL
t_WRID
SD A
V_W/R_W
VOLTAGE OUT
FIGURE 6. INCREMENT/DECREMENT TIMING LIMITS
9
FN8175.4
September 23, 2009