X9279_09 Datasheet, PDF (8/18 Pages) Intersil Corporation – Single Digitally-Controlled (XDCP™) Potentiometer

X9279
TABLE 6. WIPER COUNTER REGISTER, WCR (8-bit), WCR[7:0]: (Used to store the current wiper position (Volatile, V)
WCR7
WCR6
WCR5
WCR4
WCR3
WCR2
WCR1
WCR0
V
V
V
V
V
V
V
V
(MSB)
(LSB)
Bit 7
NV
MSB
TABLE 7. DATA REGISTER, DR (8-BIT), BIT [7:0]: Used to store wiper positions or data (Non-volatile, NV)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
NV
NV
NV
NV
NV
NV
Bit 0
NV
LSB
Device Description
Wiper Counter Register (WCR)
The X9279 contains a Wiper Counter Register, for the DCP
potentiometer. The Wiper Counter Register can be envisioned
as a 8-bit parallel and serial load counter with its outputs
decoded to select one of 256 switches along its resistor array.
The contents of the WCR can be altered in four ways: it may be
written directly by the host via the Write Wiper Counter Register
instruction (serial load); it may be written indirectly by
transferring the contents of one of four associated data
registers via the XFR Data Register instruction (parallel load); it
can be modified one step at a time by the Increment/Decrement
instruction (see “Instruction Format” on page 10 for more
details). Finally, it is loaded with the contents of its Data
Register zero (DR0) upon power-up.
The Wiper Counter Register is a volatile register; that is, its
contents are lost when the X9279 is powered-down.
Although the register is automatically loaded with the value
in DR0 upon power-up, this may be different from the value
present at power-down. Power-up guidelines are
recommended to ensure proper loadings of the DR0 value
into the WCR. The DR0 value of Bank 0 is the default value.
Data Registers (DR)
The potentiometer has four 8-bit non-volatile Data Registers
(DR3-DR0). These can be read or written directly by the host.
Data can also be transferred between any of the four Data
Registers and the associated Wiper Counter Register. All
operations changing data in one of the Data Registers is a
non-volatile operation and will take a maximum of 10ms.
If the application does not require storage of multiple
settings for the potentiometer, the Data Registers can be
used as regular memory locations for system parameters or
user preference data.
Bit [7:0] are used to store one of the 256 wiper positions
(0~255).
Instructions
Four of the seven instructions are three bytes in length.
These instructions are:
• Read Wiper Counter Register – read the current wiper
position of the potentiometer,
• Write Wiper Counter Register – change current wiper
position of the potentiometer,
• Read Data Register – read the contents of the selected
Data Register;
• Write Data Register – write a new value to the selected
Data Register.
The basic sequence of the three byte instructions is
illustrated in Figure 4. These three-byte instructions
exchange data between the WCR and one of the Data
Registers. A transfer from a Data Register to a WCR is
essentially a write to a static RAM, with the static RAM
controlling the wiper position. The response of the wiper to
this action will be delayed by t_WRL. A transfer from the WCR
(current wiper position), to a Data Register is a write to
non-volatile memory and takes a minimum of t_WR to
complete. The transfer can occur between the potentiometer
and one of its four associated registers (Bank 0).
Two instructions require a two-byte sequence to complete.
These instructions transfer data between the host and the
X9279; either between the host and one of the data registers
or directly between the host and the Wiper Counter Register.
These instructions are:
• XFR Data Register to Wiper Counter Register – This
transfers the contents of one specified Data Register to
the Wiper Counter Register.
• XFR Wiper Counter Register to Data Register – This
transfers the contents of the Wiper Counter Register to the
specified Data Register.
The final command is Increment/Decrement (Figures 5
and 6). The Increment/Decrement command is different from
the other commands. Once the command is issued and the
X9279 has responded with an acknowledge, the master can
clock the selected wiper up and/or down in one segment
steps; thereby, providing a fine tuning capability to the host.
For each SCL clock pulse (t_HIGH) while SDA is HIGH, the
selected wiper will move one resistor segment towards the
R_H terminal. Similarly, for each SCL clock pulse while SDA is
LOW, the selected wiper will move one resistor segment
towards the R_L terminal. See “Instruction Format” on
page 10 for more details.
8
FN8175.4
September 23, 2009