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| ISL71831SEH Datasheet, PDF (9/21 Pages) Intersil Corporation – Radiation Hardened 5V 32-Channel Analog Multiplexer | |||
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ISL71831SEH
Timing Diagrams
VREF
0V
ISL71831SEH
50Ω
A4
IN01
A3
A2
IN02-IN31
A1
IN32
A0
0V EN
OUT
V+, 0V
0V, V+
10kΩ
VOUT
50pF
FIGURE 3. ADDRESS TIME TO OUTPUT TEST CIRCUIT
ISL71831SEH
A4
IN01
V+
A3
A2
IN02-IN32
A1
A0
VREF
0V
EN
50 Ω
OUT
1kΩ
VOUT
50pF
FIGURE 5. TIME TO ENABLE/DISABLE OUTPUT TEST CIRCUIT
VREF
0V
ISL71831SEH
50Ω
A4
IN01
A3 IN02-IN31
A2
A1
IN32
A0
0V EN
OUT
V+
100 Ω
VOUT
50pF
FIGURE 7. BREAK-BEFORE-MAKE TEST CIRCUIT
ISL71831SEH
A4
IN01
0V
A3
A2
IN02-IN31
VREF
50Ω
A1
A0
IN32
0V
VREF
â11111â
ADDRESS
50%
50%
0V
V+
OUTPUT
â00000â
tAHL
90%
tALH
90%
0V
FIGURE 4. ADDRESS TIME TO OUTPUT DIAGRAM
VREF
ENABLE
50%
50%
0V
V+
OUTPUT
tENABLE
tDISABLE
90%
10%
0V
FIGURE 6. TIME TO ENABLE/DISABLE OUTPUT DIAGRAM
VREF
ADDRESS
0V
V+
OUT
50%
0V
tBBM
FIGURE 8. BREAK-BEFORE-MAKE DIAGRAM
VREF
ADDRESS
0V
0V EN
OUT
VOUT
100pF
FIGURE 9. CHARGE INJECTION TEST CIRCUIT
OUT
0V
Q = 100pF * ÎVOUT
ÎVOUT
FIGURE 10. CHARGE INJECTION DIAGRAM
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9
FN8759.2
November 18, 2016
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