ISL6617A_14 Datasheet, PDF (9/15 Pages) Intersil Corporation – PWM Doubler with Output Monitoring Feature

ISL6617A
TABLE 1. ISL6617A OPERATIONAL MODES
MODE
MIN
TYP
MAX
EXTENSION
Enable Low
0.8V
Enable High
2V
Interleaving#1 97%*VCC
VCC
0ns to 70ns
Interleaving#2 78%*VCC 81%*VCC 85%*VCC 120ns + (0ns to 70ns)
Synchronous 54%*VCC 60%*VCC 64%*VCC
0ns to 70ns
Not Used
From 0.8V to 2V or 54% of VCC is not recommended Region
To transition between two different modes, the EN_SYNC pin
voltage level needs to be set accordingly. Figures 6 and 7 show
an example of external circuits for mode transition between
synchronous mode and interleaving #1 or #2 mode, respectively.
The R should be less than 50kΩ to improve transition time.
PWM
PWMA
PWMB
FIGURE 4. INTERLEAVING MODE’S OPERATIONAL WAVEFORMS
(ENx = VCC, OR 81%*VCC)
PWM
PWMA
PWMB
FIGURE 5. SYNCHRONOUS MODE’S OPERATIONAL WAVEFORMS
(EN_SYNC = 60%*VCC)
40%*R
60%*R
SYNC
VCC
EN_SYNC
ISL6617A
+
-
+
-
-
+
+
TTL
-
INTERLEAVING
0ns TO 70ns
4 CYCLES
INTERLEAVING
BLANKING _{+120+(0ns TO 70ns)}
SYNC
0ns TO 70ns
EN
FIGURE 6. CONFIGURATION FOR TRANSITION BETWEEN SYNCHRONOUS AND INTERLEAVING #1 MODES
19%*R
SYNC
28.5%*R
52.5%*R
VCC
EN_SYNC
ISL6617A
+
-
+
-
-
+
+
TTL _-
INTERLEAVING
0ns TO 70ns
4 CYCLES
BLANKING
INTERLEAVING
+120+(0ns TO 70ns)
SYNC
0ns TO 70ns
EN
FIGURE 7. CONFIGURATION FOR TRANSITION BETWEEN SYNCHRONOUS AND INTERLEAVING #2 MODES
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9
FN7844.0
December 19, 2014