ISL6440A Datasheet, PDF (9/16 Pages) Intersil Corporation – Advanced PWM and Triple Linear Power Controller for Gateway Applications

ISL6440A
for the linear controllers is that they monitor the VSEN pins
for undervoltage events. Should excessive currents cause
the voltage at the VSEN pins to fall below the linear
undervoltage threshold, the LUV signal sets the
overcurrent latch if C_SS is fully charged. Blanking the LUV
signal during the C_SS charge interval allows the linear
outputs to build above the undervoltage threshold during
normal operation. Cycling the bias input power off then on
resets the counter and the fault latch.
FAULT
10V
REPORTED
0V
COUNT
=1
4V
COUNT
=2
2V
0V
OVERLOAD
APPLIED
COUNT
=3
0A
T0 T1
T2
TIME
T3
T4
FIGURE 4. OVERCURRENT OPERATION
A resistor (R_OCSET) programs the overcurrent trip level for
the PWM converter. As shown in Figure 5, the internal
200µA current sink, I_OCSET develops a voltage across
R_OCSET (V_SET) that is referenced to V_IN . The DRIVE
signal enables the overcurrent comparator (OVER-
CURRENT). When the voltage across the upper MOSFET
(V_DS) exceeds V_SET, the overcurrent comparator trips to
set the overcurrent latch. Both V_SET and V_DS are
referenced to V_IN and a small capacitor across R_OCSET
helps V_OCSET track the variations of V_IN due to MOSFET
switching. The overcurrent function will trip at a peak
inductor current (I_PEAK) determined by:
I_PEAK = ^I--^O-----^C----^S----^E_r---_D-^T---_S--^×--₍--_O-^R---_N-^O---₎--^C----^S----^E----^T-
OVERCURRENT TRIP:
VDS > VSET
iD × rDS_(ON) > IOCSET × ROCSET
OCSET
V_IN = +5V
R_OCSET
OVER-
CURRENT
OC
+
-
I_OCSET
200µA
DRIVE
V_SET +
VCC
UGATE
PHASE
i_D
+
V_DS
PWM
GATE
CONTROL
VPHASE = VIN – VDS
VOCSET = VIN – VSET
FIGURE 5. OVERCURRENT DETECTION
The OC trip point varies with MOSFET’s r_DS(ON)
temperature variations. To avoid overcurrent tripping in the
normal operating load range, determine the R_OCSET
resistor from the equation above with:
1. The maximum r_DS(ON) at the highest junction temperature.
2. The minimum I_OCSET from the specification table.
3. Determine I_PEAK for I_PEAK > I_OUT(MAX) + (∆I) /2, where
∆I is the output inductor ripple current.
For an equation for the ripple current see the section under
component guidelines titled PWM Output Inductor Selection.
OUT1 Voltage Program
The output voltage of the PWM converter is programmed to
discrete levels between 1.3V_DC and 3.5V_DC . This output
(OUT1) is designed to supply the core voltage of Intel’s
advanced microprocessors. The voltage identification (VID)
pins program an internal voltage reference (DACOUT) with a
TTL-compatible 5-bit digital-to-analog converter. The level of
DACOUT also sets the PGOOD and OVP thresholds.
Table 1 specifies the DACOUT voltage for the different
combinations of connections on the VID pins. The VID pins
can be left open for a logic 1 input, because they are
internally pulled up to an internal voltage of about 5V by a
10µA current source. Changing the VID inputs during
operation is not recommended and could toggle the PGOOD
signal and exercise the overvoltage protection.
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