ISL54302 Datasheet, PDF (9/16 Pages) Intersil Corporation – 12V, 1.5OHM Quad SPST Switch with Latched Parallel Interface

ISL54302
Logic-Level Thresholds
VLOGIC and GND power the internal logic level shifter
stages, so VPLUS and VSS have no affect on logic
thresholds. Thus, SX-CTRL, CS-LATCH receive thresholds
which will remain constant, despite changes to VPLUS and
VSS.
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both VPLUS and VSS.
One of these diodes conducts if any analog signal exceeds
VPLUS or VSS.
ISL54302 Device Programming
Programming the device entails accessing the internal
switch control registers. To write data into the register, the
data must be transferred via the CS-LATCH pin.
Via the CS-LATCH pin, the programmer has complete
control as to “when” data is transferred to the internal
latches. Until such time as the CS-LATCH pin is “toggled,”
the device will remain as previously programmed. Therefore,
data transitions on the SX-CTRL inputs will not effect the
switch’s operational condition.
9
March 19, 2008