ISL54302 Datasheet, PDF (5/16 Pages) Intersil Corporation – 12V, 1.5OHM Quad SPST Switch with Latched Parallel Interface

ISL54302
Electrical Specifications Test Conditions: VPLUS = +7V, VSS = 0V Supply, VLOGIC= 3V, VDD = 3V, GND = 0V, V_INH = 2.2V, V_INL = 0.8V,
Unless Otherwise Specified. (Continued)
PARAMETER
TEST CONDITIONS
TEMP MIN
TYP
MAX
(°C) (Note 9) (Note 10) (Note 9) UNITS
SW-CTRL (1-4) Into CS_Latch
Setup Time
t_SETUP (Note 6, Figure 5)
Full
1
ns
SW-CTRL (1-4) Into CS_Latch Hold t_HOLD (Note 6, Figure 5)
Time
Full
3.5
ns
Input Current, I_INH, I_INL
CS_LATCH Rise, Fall Time
V_IN = 0V or VLOGIC
10% to 90% and 90% to 10%
Full
-1
0.01
1
µA
Full
3
ns
CS_LATCH Minimum Pulse Width Rising to Falling Edge 50% Points
Full
10
ns
DYNAMIC CHARACTERISTICS
Turn-ON Time, t_ON
VXA or VXB = 3V, R_L = 300Ω, C_L = 35pF
25
25
ns
(see Figure 1)
Full
30
ns
Turn-OFF Time, t_OFF
VXA or VXB = 3V, R_L = 300Ω, C_L = 35pF
25
80
ns
(see Figure 1)
Full
85
ns
OFF Capacitance, C_OFF
ON Capacitance, C_COM(ON)
OFF Isolation
Crosstalk (Note 5)
f = 1MHz, VXA or VXB = V_COM = 0V
f = 1MHz, VXA or VXB = V_COM = 0V
R_L = 50Ω, C_L = 15pF, f = 1MHz,
VXA or VXB= 1V_P-P (see Figure 3)
25
50
pF
25
100
pF
25
-45
dB
25
-65
dB
Switch Contact 3dB Bandwidth
R_L = 50Ω, C_L = 5pF
25
Charge Injection, Q
C_L = 1nF, V_G = 0V, R_G = 0Ω (see Figure 2)
25
POWER SUPPLY CHARACTERISTICS
60
MHz
25
pC
VPLUS Supply, I (Quiescent)
25
13
µA
Full
15
45
µA
VPLUS Supply, I (40MHz)
25
18
µA
Full
20
µA
VSS Supply, I (Quiescent)
25
14
µA
Full
19
50
µA
VSS Supply, I (40MHz)
25
0.7
mA
Full
0.7
mA
VDD Supply, I (Quiescent)
25
1
µA
Full
4
10
µA
VDD Supply, I (40MHz)
25
0.4
mA
Full
0.5
mA
VLOGIC Internal Logic Supply, I
(Quiescent)
25
0
µA
Full
1
10
µA
VLOGIC Internal Logic Supply, I
(40MHz)
25
3.2
mA
Full
3.2
mA
NOTES:
4. Flatness is defined as the delta between the maximum and minimum r_ON values over the specified voltage range.
5. Between any two switches.
6. CS_LATCH must remain low when changing SW-CTRL(1-4) condition. Likewise, while CS_LATCH is being toggled, it is important to keep SW-
CTRL(1-4) in the intended switch condition.
7. Typical Values are not production tested
8. Digital Characteristics remain stable with respect to VPLUS and VSS variation. These parameters are controlled by the difference between VSS
and VDD, which the user should maintain at a constant spread of VDD = VSS + 3V.
9. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested.
10. Limits established by characterization and are not production tested.
5
March 19, 2008